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IMSA110 数据表(PDF) 2 Page - STMicroelectronics |
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IMSA110 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 26 page ![]() Notes : 1. All VCC pins must be connected to the 5 Volt power supply. 2. All GND pins must be connected to ground. RESET Vcc A B C D E F G H J K 12 34 567 89 10 Index PSRIN [6] PSRIN [4] PSRIN [2] PSRIN [1] CIN [3] CLK PSRIN [7] CIN [4] CIN [0] CIN [2] Vcc GND CIN [5] CIN [8] CIN [6] CIN [7] CIN [13] CIN [15] CIN [17] CIN [14] CIN [19] CIN [21] CIN [16] CIN [20] W CIN [18] ADR [0] ADR [1] PSRIN [3] PSRIN [5] GND PSROUT [0] PSROUT [1] PSROUT [2] GND PSROUT [3] PSROUT [5] PSROUT [6] PSROUT [7] COUT [0] COUT [2] COUT [4] COUT [1] GND COUT [6] COUT [7] COUT [9] Vcc COUT [10] COUT [12] COUT [13] COUT [14] Vcc GND COUT [15] COUT [19] COUT [18] COUT [17] Vcc Vcc D[5] D[7] COUT [21] D[3] D[4] D[1] GND D[2] D[0] ADR [7] ADR [6] ADR [8] ADR [2] ADR [3] E1 E2 CIN [1] CIN [12] ADR [5] Vcc GND GND GND GND GND PSRIN [0] PSROUT [4] COUT [8] COUT [3] COUT [11] COUT [16] D[6] COUT [5] CIN [9] CIN [10] CIN [11] ADR [4] COUT [20] PIN CONNECTIONS 1. INTRODUCTION The IMSA110 is a single-chip reconfigurable and cascadable subsystem suitable for many high speed image and signal processing applications. Apart from its powerful multiply-accumulate capa- bility (420 MOPs), the strength of the IMSA110 lies in its extensive programmable support for data conditioning and transformation. 2. DESCRIPTION The IMSA110 consists of a configurable array of multiply-accumulators, three programmable length 1120 stage shift registers, a versatile post-process- ing unit and a microprocessor interface for configu- ration and control purposes. The comprehensive on-chip facilities make a single device capable of dealing with many image processing operations. IMSA110 2/26 |
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