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IMSA110 数据表(PDF) 4 Page - STMicroelectronics |
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IMSA110 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 26 page  X D X D X X D D D CR1c coefficient registers 7 x 8 bits CR0c coefficient registers 7 x 8 bits 3 11 1 1 D 22 X D X D X X D D D 3 11 1 1 D 22 X D X D X X D D D 3 11 1 1 D 22 CR1b coefficient registers 7 x 8 bits CR0b coefficient registers 7 x 8 bits CR1a coefficient registers 7 x 8 bits CR0a coefficient registers 7 x 8 bits D D D D D D 1 2 1 1 2 1 1 2 1 Programmable PSRC shift register 0 to 1120 stages D 1 8 8 MUX 8 8 Programmable PSRA shift register 0 to 1120 stages Programmable PSRB shift register 0 to 1120 stages D 1 13 D D 22 5 1 2 1 2 Backend processing unit including cascade data path, normalization, saturation units and data transformation look up tables (see Figure 4 for detail) cascade input cascade output COUT CIN PSROUT PSRIN Figure 2 : Synchronous Functions of the IMSA110 IMSA110 4/26 |
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