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FT201XS-R 数据表(PDF) 31 Page - Future Technology Devices International Ltd. |
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FT201XS-R 数据表(HTML) 31 Page - Future Technology Devices International Ltd. |
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31 / 49 page ![]() Copyright © 2014 Future Technology Devices International Limited 31 FT201X USB I2C SLAVE IC Datasheet Version 1.4 Document No.: FT_000627 Clearance No.: FTDI# 264 9.2 I2C Interface From an I2C point of view, the FT-X behaves as a standard I2C slave. Data transfers take the same form as a standard I2C communication. In addition to reading and writing, there are some other commands which can be used to determine the status of the device and these are covered in this section and in further detail in section 9.3. Note: This section uses 7-bit addressing in the examples. It uses eight characters to describe the seven address bits and the single read/write bit. For example, 1110 011 1 means address 0x73 with the Read/Write bit set to 1, and therefore corresponds to a read of address 0x73. Data values are represented in bytes, for example, 1010 0101 for data value 0xA5. 9.2.1 Addressing The FT-X can be given a custom slave address on the I2C bus. This is stored in MTP memory and can be re-programmed over USB or I2C. Please see the separate MTP Programming information in section 10. The slave address is used when reading and writing to the device. The FT-X supports both 7-bit and 10- bit addressing. The general call address (0000 000 0) is for addressing every device on the bus. Some slaves do not support the General Call Address though the FT-X devices do support it. They will acknowledge this address, receive the second byte and interpret it. There are several commands available for this second byte. The FT-X will support the Software Reset command which is part of the I2C specification as well as other custom FTDI commands. These are covered in more detail later in the Other I2C Commands section. 9.2.2 Data Transfers Reading and Writing For all I2C data transfers to and from the FT-X, the slave address of the FT-X is used. The figure below shows a typical 7-bit address transfer for each direction. Figure 9.1: Data transfers using 7-bit addressing The figure below summarises all of the transfers available (7-bit and 10-bit addressing). |
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