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ADGM3121BCCZ-R2 数据表(PDF) 25 Page - Analog Devices |
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ADGM3121BCCZ-R2 数据表(HTML) 25 Page - Analog Devices |
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25 / 33 page ![]() Data Sheet ADGM3121 THEORY OF OPERATION analog.com Rev. 0 | 25 of 33 Internal Error Status Where an internal error is detected in the part, it is flagged in the internal error status bits [7:6] of the SWITCH_DATA register. An internal error results from an error in the configuration of the part at power-up. INTERNAL OSCILLATOR FEEDTHROUGH The ADGM3121 has an internal oscillator running at a nominal 10MHz. This oscillator drives the charge pump circuitry that pro- vides the actuation voltage for each of the switch gate electrodes. Although this oscillator is very low power, the 10MHz signal is coupled to the switch and can be considered a noise spur on the switch channels. The magnitude of this feedthrough noise spur is specified in Table 1 and is typically −92.5dBm when one switch is on. The VDD level and temperature changes affect the frequency of the noise spur. For the maximum and minimum frequency ranges over temperature and voltage supply range, see Table 1. TYPICAL OPERATING CIRCUIT Figure 69 shows the typical operating circuit for the ADGM3121. VDD is connected to 3.3V. EP connects to GND internally. It is recommended to connect GND using one large pad on the PCB to short together GND with EP. Figure 69 shows the ADGM3121 configured to use the internal oscillator as the reference clock to the driver IC control circuit. Place a 0.1nF capacitor rated to at least 100V DC as close as possible to VCP. Place a 0.1uF capacitor rated to at least 16V DC as close as possible to VDD. Figure 69. Typical Operating Circuit in the Parallel Digital Interface Mode |
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