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AD8330ACP-R2 数据表(PDF) 29 Page - Analog Devices |
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AD8330ACP-R2 数据表(HTML) 29 Page - Analog Devices |
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29 / 36 page ![]() AD8330 Rev. D | Page 29 of 36 OPTIONS Table 6 lists the jumpers on the board and their functions. Table 6. Functions of Jumpers Name Function FLTR Connects a high-pass filter to the offset control loop pin. This jumper is normally not installed. OFST Disables the offset correction loop. This jumper is installed for dc or low frequency operation. UP Mode up. Install for ascending gain with increasing VDBS gain control voltage. DOWN Mode down. Install for descending gain with increasing VDBS gain control voltage. MEASUREMENT SETUP The basic board connections for a typical measurement are shown in Figure 71. To minimize circuit-loading effects, a low capacitance FET probe is recommended for observing input or output waveforms. Two-pin headers, IN_TEST and OUT_TEST, are provided for this purpose. The SMA connectors OUT_HI and OUT_LO can also be used, but the user may need to account for load capacitance effects. AD8330-EVALZ BOARD DESIGN The AD8330-EVALZ is a 4-layer design for maximum ground- plane area. The evaluation board side silkscreen and wiring patterns are shown in Figure 72 through Figure 77. POWER SUPPLY DIFFERENTIAL PROBE +5V GND PROBE POWER SUPPLY NETWORK ANALYZER SIGNAL INPUT PRECISION VOLTAGE REFERENCES (FOR VDBS, VMAG) Figure 71. Typical Connections |
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