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AD8330ACP-R2 数据表(PDF) 6 Page - Analog Devices

部件名 AD8330ACP-R2
功能描述  Low Cost, DC to 150 MHz Variable Gain Amplifier
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8330ACP-R2 数据表(HTML) 6 Page - Analog Devices

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AD8330
Rev. D | Page 6 of 36
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
VSPI
2
INHI
3
INLO
4
MODE
12
11
10
9
VPSO
OPHI
OPLO
CMOP
16
15
14
13
567
8
AD8330
TOP VIEW
(Not to Scale)
Figure 2. 16-Lead LFCSP Pin Configuration
1
S
O
P
V
T
S
F
O
16
2
R
T
N
C
L
B
N
E
15
3
O
S
P
V
I
S
P
V
14
4
I
H
P
O
I
H
N
I
13
5
O
L
P
O
O
L
N
I
12
6
P
O
M
C
E
D
O
M
11
7
G
A
M
V
S
B
D
V
10
8
M
M
O
C
N
G
M
C
9
AD8330
TOP VIEW
(Not to Scale)
Figure 3. 16-Lead QSOP Pin Configuration
Table 3. 16-Lead LFCSP Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VPSI
Positive Supply for Input Stages.
2
INHI
Differential Signal Input, Positive
Polarity.
3
INLO
Differential Signal Input, Negative
Polarity.
4
MODE
Logic Input: Selects Gain Slope.
High = gain up vs. VDBS.
5
VDBS
Input for Linear-in-dB Gain Control
Voltage, VDBS.
6
CMGN
Common Baseline for Gain Control
Interfaces.
7
COMM
Ground for Input and Gain Control Bias
Circuitry.
8
VMAG
Input for Gain/Amplitude Control, VMAG.
9
CMOP
Ground for Output Stages.
10
OPLO
Differential Signal Output, Negative
Polarity.
11
OPHI
Differential Signal Output, Positive
Polarity.
12
VPSO
Positive Supply for Output Stages.
13
CNTR
Common-Mode Output Voltage Control.
14
VPOS
Positive Supply for Inner Stages.
15
OFST
Used in Offset Control Modes.
16
ENBL
Power Enable, Active High.
Table 4. 16-Lead QSOP Pin Function Descriptions
Pin No.
Mnemonic
Description
1
OFST
Used in Offset Control Modes.
2
ENBL
Power Enable, Active High.
3
VPSI
Positive Supply for Input Stages.
4
INHI
Differential Signal Input, Positive
Polarity.
5
INLO
Differential Signal Input, Negative
Polarity.
6
MODE
Logic Input: Selects Gain Slope.
High = gain up vs. VDBS.
7
VDBS
Input for linear-in-dB Gain Control
Voltage, VDBS.
8
CMGN
Common Baseline for Gain Control
Interfaces.
9
COMM
Ground for Input and Gain Control Bias
Circuitry.
10
VMAG
Input for Gain/Amplitude Control, VMAG.
11
CMOP
Ground for Output Stages.
12
OPLO
Differential Signal Output, Negative
Polarity.
13
OPHI
Differential Signal Output, Positive
Polarity.
14
VPSO
Positive Supply for Output Stages.
15
CNTR
Common-Mode Output Voltage Control.
16
VPOS
Positive Supply for Inner Stages.



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