LTC6754

15

6754f

For more information www.linear.com/LTC6754

applicaTions inForMaTion

Shutdown

TheLTC6754UD(QFNpackage)hasashutdownpin(SHDN,

active low) that can reduce the total supply current to a

typical value of only 1.05mA. When the part is in shut-

down, the outputs are placed in a high impedance state.

The shutdown pin needs to be taken to within 800mV of

the negative supply for the part to shut down. When left

floating, the shutdown pin is internally pulled towards the

positive supply and comparators remain fully biased on.

Dispersion

Dispersion is defined as the change in propagation delay

for different input overdrive or common mode conditions.

It becomes very crucial in timing sensitive applications.

Overdrive dispersion from 10mV overdrive to 125mV

overdrive (150mV total step size) is typically 1ns. The

graph titled Propagation Delay vs Common Mode volt-

age shows the dispersion due to shifts in input common

mode voltage.

Jitter

The LTC6754 has been designed for low phase noise and

jitter. This allows it to be used in applications where high

frequency low amplitude sine waves need to be converted

to full LVDS level outputs with minimal additive jitter. The

graphtitledOutputJittervsInputAmplitudedemonstrates

the additive jitter of the LTC6754 for different amplitudes

of a sinusoidal input. Refer to the Electrical Characteristics

Table to see how jitter varies with signal frequency.

High Speed Board Design Techniques

In order to obtain optimal performance from the LTC6754,

certainguidelinesregardingsignalroutingandpowersup-

plybypassingshouldbecarefullyfollowed.Ifimplemented

properly, output signal integrity can be maintained, oscil-

lationscanbeeliminatedandelectromagneticinterference

due to fast switching at the outputs can be minimized.

TheLTC6754hasbeendesignedtodriveLVDSloads.LVDS

receiversareterminatedwith100Ωloadsconnecteddiffer-

entially to the outputs of the transmitter. In order to obtain

thefastestperformanceoutoftheLTC6754,the100Ωload

should be connected directly across the LTC6754’s output

pins (Q and Q) if possible. Surface mounted resistors as

opposed to leaded resistors are preferable due to lower

parasiticinductancesandcapacitances.Inmanysituations,

however, it may not be possible to keep the LTC6754 close

totheLVDSreceiver.Insuchsituations,50Ωtransmission

linesshouldbeusedtoroutetheoutputsoftheLTC6754to

the 100Ω receiver as shown in Figure 8. Since the outputs

of the LTC6754 are fully differential in nature, each output

sees a 50Ω load at the receiver. Using 50Ω characteristic

impedance transmission lines minimizes reflections from

the load and helps to maintain signal integrity. It is crucial,

however, that the traces on both outputs be symmetrical,

otherwise reflections may occur, since the broadband

impedance seen by each single ended output would then

deviate from 50Ω.

Q

100

Q

–

+

Z = 50

Z = 50

LTC6754

6754 F08

Figure 8. Routing LTC6754 Outputs to a 100Ω LVDS Receiver

Asymmetrical routing on the outputs should also be

avoided as this reduces the extent to which EMI induced

by the positive and negative outputs cancel each other.

AdditionalimprovementsinEMIcanbeobtainedbyshield-

ing the output traces with a low impedance ground plane

Parasitic feedback between +IN and Q on one hand, and

between –IN and Q on the other, should be minimized to

avoidoscillations.Iftheinputsandcomplementaryoutputs

can’t be placed away from each other, a ground trace as

a shield should be used to isolate them.

The positive supply pins should be adequately bypassed

to the VEE pin to minimize transients on the supply. Low

ESR and ESL capacitors are required due to the high speed

nature of the device.

Even a few nanohenries of parasitic trace inductance in

serieswiththesupplybypassingcancauseseveralhundred

millivolts of disturbance on the supply pins during output

transitions, especially if the supply is used to power up

other devices that are also switching. A 2.2μF capacitor