LTC6754

18

6754f

For more information www.linear.com/LTC6754

Both the cable driver and LVDS receiver are implemented

using LTC6754's. Figure 18 shows the input clock signal

to the cable driver and the outputs of the receiver.

Logic Clock Source to LVDS Cable Driver and Receiver

Figure 17 shows a 250MHz 1.8V logic clock signal being

driven across 8 feet of differential Cat6 cable to generate

a 250MHz LVDS clock signal at the receiver end.

100

100

–

+

3V

6754 F11

VCCI

LTC6754

VCCO

VEE

Q

Q

+IN

–IN

49.9

49.9

49.9

–

+

3V

6754 F11

VCCI

LTC6754

VCCO

VEE

Q

Q

VREF

= 450mV

+IN

–IN

RJ45

RJ45

1.8V

CLOCK

SOURCE

CAT6 CABLE 8ft

250MHz

(DRIVER)

(RECEIVER)

DRIVER

INPUT

Figure 17. Logic Clock Source to LVDS Cable Driver and Receiver

1.25ns/DIV

Q

Q

RECEIVER OUTPUTS

VOCM = 1.25V

100mV/DIV

DRIVER INPUT

1V/DIV

0V

6754 F18

Figure 18. LVDS Receiver Output, 250MHz

Typical applicaTions

Common Mode Rejecting Line Receiver

Differential electrical signals being transmitted over long

cables are often attenuated. Electrical noise on the cables

can take the form of common mode signals.

The LTC6754 comparators can be used to retrieve attenu-

ated differential signals that have been corrupted by high

frequency common mode noise, as shown in Figure 15.

Figure 16 shows the inputs and outputs of an LTC6754

retrieving a 300MHz, 140mVP–P differential input signal

that has 1.3V of random, common mode noise superim-

posed on it. The supply used was 3.0V (VCCI and VCCO).

A small amount of modulation is seen at the output due

to a small amount of differential modulation at the inputs,

whichcausescycletocyclevariationsinpropagationdelay.

VCCI

VCCO

–

+

Q

100

Q

6754 T01a

SMALL DIFFERENTIAL SIGNAL WITH

LARGE COMMON MODE COMPONENT

VEE

+IN

–IN

LTC6754

Figure 15. Common Mode Rejecting Line Receiver

20ns/DIV

Q – Q

100mV/DIV

0mV

+IN, –IN

200mV/DIV

700mV

6754 F16

–IN

Q – Q

+IN

Figure 16.