MPC7441 datasheet(10/60 Pages) FREESCALE

10 / 60 page

MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4

Freescale Semiconductor

Electrical and Thermal Characteristics

Figure 2 shows the undershoot and overshoot voltage on the MPC7448.

Figure 2. Overshoot/Undershoot Voltage

The MPC7448 provides several I/O voltages to support both compatibility with existing systems and

migration to future systems. The MPC7448 core voltage must always be provided at the nominal voltage

(see Table 4). The input voltage threshold for each bus is selected by sampling the state of the voltage

select pins at the negation of the signal HRESET. The output voltage will swing from GND to the

maximum voltage applied to the OVDD power pins. Table 3 provides the input threshold voltage settings.

Because these settings may change in future products, it is recommended that BVSEL[0:1] be configured

using resistor options, jumpers, or some other flexible means, with the capability to reconfigure the

termination of this signal in the future, if necessary.

Table 3. Input Threshold Voltage Setting

BVSEL0

BVSEL1

I/O Voltage Mode1

Notes

1.8 V

2, 3

2.5 V

2, 4

1.5 V

2.5 V

Notes:

1. Caution: The I/O voltage mode selected must agree with the OVDD voltages

supplied. See Table 4.

2. If used, pull-down resistors should be less than 250

Ω.

3. The pin configuration used to select 1.8V mode on the MPC7448 is not compatible

with the pin configuration used to select 1.8V mode on the MPC7447A and earlier

devices.

4. The pin configuration used to select 2.5V mode on the MPC7448 is fully compatible

with the pin configuration used to select 2.5V mode on the MPC7447A and earlier

devices.

VIH

GND

GND – 0.3 V

GND – 0.7 V

Not to Exceed 10%

OVDD + 20%

VIL

OVDD

OVDD + 5%

of tSYSCLK

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