MPF0900AMMA2ES datasheet(105/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

SWx_PH[2:0]

Phase control

001

90°

010

135°

011

180°

100

225°

101

270°

110

315°

111

0°

Table 135. SWx phase shift selection bits...continued

13.2.3.1 Multiphase operation

Regulators SW2 and SW3 can be configured for dual-phase operation via the OTP_SW2CONFIG[1:0] bits.

OTP_SW2CONFIG[1:0]

SW2 and SW3 operation

Single-phase mode

Dual-phase mode

Reserved (disabled)

Table 136. SW2 and SW3 multiphase configuration bits

In single-phase mode, SW2 and SW3 operate independently ofeach other.

When SW2 and SW3 are configured in dual-phase mode, SW2 will become the primary channel and will control

most of the configuration of the resulting multi-phase channel, with the exception of the phase configuration,

which is controlled independently for each channel via the SW2_PH[2:0] and SW3_PH[2:0] bits, respectively.

Regulators SW4 and SW5 can be configured in dual-phase operation via the OTP_SW4CONFIG[1:0] bits. In

single-phase mode, SW4 and SW5 operate independently of each other.

OTP_SW4CONFIG[1:0]

SW4 and SW5 operation

Single-phase mode

Dual-phase mode

Reserved (disabled)

Table 137. SW4 and SW5 multiphase configuration bits

When SW4 and SW5 are configured in dual-phase mode, SW4 will become the primary channel and will control

most of the configuration of the resulting multi-phase channel, with the exception of the phase configuration,

which is controlled independently for each channel via the SW4_PH[2:0] and SW5_PH[2:0] bits, respectively.

PF09

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Product data sheet

Rev. 1.3 — 16 December 2025

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