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MPF0900AMMA2ES 数据表(PDF) 116 Page - NXP Semiconductors |
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MPF0900AMMA2ES 数据表(HTML) 116 Page - NXP Semiconductors |
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116 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring 13.2.5.1 Load switch mode In load switch mode, the LDO works as an ON/OFF load switch controlled by the LDOx_RUN_EN, LDOx_STBY_EN and LDOx_SEQ[7:0] bits. In load switch mode, the block is capable of taking an input as low as 1.8 V and enabling the output in the Power-up sequence or manually via the LDOx_RUN_EN and LDOx_STBY_EN bits. When the LDOx is operating in the load switch mode, the monitoring voltage level is set by the VLDOx_RUN[4:0] and the VLDOx_STBY[4:0] bits in the RUN and monitored STANDBY states respectively. It is responsibility of the system designer to set the monitoring setpoint and the OV/UV monitoring threshold to a proper level to account for DC losses in the pass FET. 13.2.5.2 External VMON mode Refer to section LDO2 / LDO3 External VMON Operation for a detailed description of the VMON operation on the LDOx block. 13.2.5.3 LDO bypass mode The LDO bypass mode is provided to support applications requiring multiple PMICs to supply a complete power architecture where the PF09 is intended to be the main PMIC. In these systems, the PF09 performs control and monitoring of the system voltage supplies during normal operation, as well as driving the full system in the Low- power modes. In such scenarios, LDOxOUT is intended to serve as an external voltage monitoring input, supervising an external regulator supplying high power to system loads during the RUN state. When the system is ready to enter the STANDBY state, the LDOx output can take over the voltage domain, allowing the system to fully disable the external regulators to minimize power consumption during the low-power operation. aaa-056070 SW1 VIN VIN VIN LDO3IN FB+ FB- LX PF53 LDO3 PF09 VDD_SOC MCU LDO3OUT To VLDO3MON Figure 26. System connection in LDO bypass mode When the LDO is operating in bypass mode, only the internal VLDOxMON is enabled during the Power-up sequence, and it remains enabled during the RUN state. The VLDOx_RUN[3:0] bits will be used to set the monitoring voltage level to be expected at the LDOxOUT pin. When the LDOx block is enabled in bypass mode (in the sequence or manually), a programmable blanking time is set via the OTP_VLDOxMON_TSET[1:0] bits, to allow enough time for the external supply to ramp up and settle before allowing OV and UV protection. PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 116 / 205 |
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