STM32L4P5CE datasheet(49/311 Pages) STMICROELECTRONICS

49 / 311 page

DS12903 Rev 2

49/311

STM32L4P5xx

Functional overview

•

Dual DAC channel independent or simultaneous conversions

•

DMA capability for each channel

•

External triggers for conversion

•

Sample and hold low-power mode, with internal or external capacitor

The DAC channels are triggered through the timer update outputs that are also connected

to different DMA channels.

3.23

Voltage reference buffer (VREFBUF)

The devices embed a voltage reference buffer which can be used as voltage reference for

ADC, DACs and also as voltage reference for external components through the VREF+ pin.

The internal voltage reference buffer supports two voltages:

•

2.042 V

•

2.5 V

An external voltage reference can be provided through the VREF+ pin when the internal

voltage reference buffer is off.

The VREF+ pin is double-bonded with VDDA on some packages. In these packages the

internal voltage reference buffer is not available.

Figure 7. Voltage reference buffer

3.24

Comparators (COMP)

The devices embed two rail-to-rail comparators with programmable reference voltage

(internal or external), hysteresis and speed (low speed for low-power) and with selectable

output polarity.

The reference voltage can be one of the following:

•

External I/O

•

DAC output channels

•

Internal reference voltage or submultiple (1/4, 1/2, 3/4).

All comparators can wake up from Stop mode, generate interrupts and breaks for the timers

and can also be combined into a window comparator.

MSv40197V1

VREFBUF

Low frequency

cut-off capacitor

DAC, ADC

Bandgap

VDDA

100 nF

VREF+

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