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STM32L4P5CE 数据表(PDF) 62 Page - STMicroelectronics

部件名 STM32L4P5CE
功能描述  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  311 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE 数据表(HTML) 62 Page - STMicroelectronics

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Functional overview
STM32L4P5xx
62/311
DS12903 Rev 2
The SDMMC features include the following:
•
Full compliance with MultiMediaCard System Specification Version 4.51. Card support
for three different databus modes: 1-bit (default), 4-bit and 8-bit
•
Full compatibility with previous versions of MultiMediaCards (backward compatibility)
•
Full compliance with SD Memory Card Specifications Version 4.1. (SDR104
SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and UHS-II mode
not supported)
•
Full compliance with SDIO Card Specification Version 4.0: card support for two different
databus modes: 1-bit (default) and 4-bit. (SDR104 SDMMC_CK speed limited to
maximum allowed IO speed, SPI mode and UHS-II mode not supported)
•
Data transfer up to 104 Mbyte/s for the 8-bit mode (depending maximum allowed IO
speed)
•
Data and command output enable signals to control external bidirectional drivers.
3.41
Controller area network (CAN)
The CAN is compliant with the 2.0A and B (active) specifications with a bit rate of up to
1 Mbit/s. They can receive and transmit standard frames with 11-bit identifiers as well as
extended frames with 29-bit identifiers. The CAN has three transmit mailboxes, two receive
FIFOS with three stages and 28 shared scalable filter banks (all of them can be used even if
one CAN is used). 256 bytes of SRAM are allocated.
The CAN peripheral supports:
•
CAN protocol version 2.0 A, B Active
•
Bit rates of up to 1 Mbit/s
•
Transmission
–
Three transmit mailboxes
–
Configurable transmit priority
•
Reception
–
Two receive FIFOs with three stages
–
Scalable filter banks: 28 filter banks
–
Identifier list feature
–
Configurable FIFO overrun
•
Time-triggered communication option
–
Disable automatic retransmission mode
–
16-bit free running timer
–
Time Stamp sent in last two data bytes
•
Management
–
Maskable interrupts
–
Software-efficient mailbox mapping at a unique address space



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