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STM32L4P5CE 数据表(PDF) 309 Page - STMicroelectronics

部件名 STM32L4P5CE
功能描述  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  311 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE 数据表(HTML) 309 Page - STMicroelectronics

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DS12903 Rev 2
309/311
STM32L4P5xx
Revision history
310
9
Revision history
Table 137. Document revision history
Date
Revision
Changes
19-Dec-2019
1
Initial release.
10-Mar-2020
2
Updated Cover.
Updated ‘DAC1&2’ in ‘DAC1’ in:
– Figure 1: STM32L4P5xx block diagram.
– Table 2: STM32L4P5xx features and peripheral counts.
– Table 4: STM32L4P5xx modes overview.
– Table 5: Functionalities depending on the working mode.
– Table 6: STM32L4P5xx peripherals interconnect matrix.
– Table 51: STM32L4P5xx peripheral current consumption
Updated VDD12 voltage range ‘1.00 V to1.32 V’ in:
– Section 3.7.1: Power supply schemes.
– Figure 26: STM32L4P5xx power supply scheme.
Updated:
– Table 14: Legend/abbreviations used in the pinout table adding note.
– Table 18: Voltage characteristics VREF+ data.
Updated current consumptions in:
– Table 25: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in single Bank, ART
enable (Cache ON Prefetch OFF).
– Table 26: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in single Bank, ART
enable (Cache ON Prefetch OFF) and power supplied by external
SMPS.
– Table 27: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in dual bank, ART
enable (Cache ON Prefetch OFF).
– Table 28: Consumption in Run and Low-power run modes, code with
data processing running from Flash in dual bank, ART enable (Cache
ON Prefetch OFF) and power supplied by external SMPS.
– Table 29: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in single bank, ART
disable.
– Table 30: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in single bank, ART
disable and power supplied by external SMPS.
– Table 31: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in dual bank, ART
disable.
– Table 32: Current consumption in Run and Low-power run modes,
code with data processing running from Flash in dual bank, ART
disable and power supplied by external SMPS.



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