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ST7LITEU05 数据表(PDF) 32 Page - STMicroelectronics |
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ST7LITEU05 数据表(HTML) 32 Page - STMicroelectronics |
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32 / 115 page ![]() ST7LITEU05 ST7LITEU09 32/115 INTERRUPTS (cont’d) Figure 18. Interrupt Processing Flowchart Table 10. Interrupt mapping Notes: 1. This interrupt exits the MCU from “Auto Wake-up from HALT” mode only. 2. Whatever the sensitivity configuration, this interrupt cannot exit the MCU from HALT, ACTIVE-HALT and AWUFH modes when a falling edge occurs. 3. This interrupt exits the MCU from “WAIT” and “ACTIVE-HALT” modes only. Moreover IS4[1:0] =01 is the only safe con- figuration to avoid spurious interrupt in Halt and AWUFH modes. 4. These interrupts exit the MCU from “ACTIVE-HALT” mode only. N° Source Block Description Register Label Priority Order Exit from HALT Address Vector RESET Reset N/A Highest Priority Lowest Priority yes FFFEh-FFFFh TRAP Software Interrupt no FFFCh-FFFDh 0 AWU Auto Wakeup Interrupt AWUCSR yes 1) FFFAh-FFFBh 1 ei0 External Interrupt 0 N/A yes FFF8h-FFF9h 2 ei1 External Interrupt 1 FFF6h-FFF7h 3 2) ei2 2) External Interrupt 22) FFF4h-FFF5h 4 Not used no FFF2h-FFF3h 5 ei3 External Interrupt 3 yes FFF0h-FFF1h 6 3) ei4 3) External Interrupt 4 3) no 3) FFEEh-FFEFh 7 SI AVD interrupt SICSR no FFECh-FFEDh 8 AT TIMER AT TIMER Output Compare Interrupt PWMxCSR or ATCSR no FFEAh-FFEBh 9 AT TIMER Overflow Interrupt ATCSR yes 4) FFE8h-FFE9h 10 LITE TIMER LITE TIMER Input Capture Interrupt LTCSR no FFE6h-FFE7h 11 LITE TIMER RTC1 Interrupt LTCSR yes 4) FFE4h-FFE5h 12 Not used no FFE2h-FFE3h 13 Not used no FFE0h-FFE1h I BIT SET? Y N IRET? Y N FROM RESET LOAD PC FROM INTERRUPT VECTOR STACK PC, X, A, CC SET I BIT FETCH NEXT INSTRUCTION EXECUTE INSTRUCTION THIS CLEARS I BIT BY DEFAULT RESTORE PC, X, A, CC FROM STACK INTERRUPT Y N PENDING? 1 |
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