ST7LITEU05 datasheet(36/115 Pages) STMICROELECTRONICS

部件名	ST7LITEU05

功能描述	8-bit MCU with single voltage Flash memory, ADC, timers

PDF	115 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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36 / 115 page

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SYSTEM INTEGRITY MANAGEMENT (Cont’d)

Figure 21. Using the AVD to Monitor VDD

8.4.3 Low Power Modes

8.4.3.1 Interrupts

The AVD interrupt event generates an interrupt if

the corresponding Enable Control Bit (AVDIE) is

set and the interrupt mask in the CC register is re-

set (RIM instruction).

VDD

VIT+(AVD)

VIT-(AVD)

AVDF bit

RESET

IF AVDIE bit = 1

Vhyst

AVD INTERRUPT

REQUEST

INTERRUPT Cleared by

VIT+(LVD)

VIT-(LVD)

LVD RESET

Early Warning Interrupt

(Power has dropped, MCU not

not yet in reset)

hardware

INTERRUPT Cleared by

reset

Mode

Description

WAIT

No effect on SI. AVD interrupts cause the

device to exit from Wait mode.

HALT

The SICSR register is frozen.

The AVD remains active but the AVD inter-

rupt cannot be used to exit from Halt mode.

Interrupt Event

Event

Flag

Enable

Control

Bit

Exit

from

Wait

Exit

from

Halt

AVD event

AVDF

AVDIE

Yes

ST7LITEU05 数据表(PDF) 36 Page - STMicroelectronics

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