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R5F10JBCAFP 数据表(PDF) 73 Page - Renesas Technology Corp |
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R5F10JBCAFP 数据表(HTML) 73 Page - Renesas Technology Corp |
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73 / 142 page ![]() RL78/G1C 2. ELECTRICAL SPECIFICATIONS (A: TA = -40 to +85°C) Page 73 of 138 R01DS0348EJ0140 Rev.1.40 Apr 26, 2024 LVD Detection Voltage of Interrupt & Reset Mode (TA = −40 to +85°C, VPDR ≤ VDD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Interrupt and reset mode VLVDC0 VPOC2, VPOC1, VPOC0 = 0, 1, 0, falling reset voltage 2.40 2.45 2.50 V VLVDC1 LVIS1, LVIS0 = 1, 0 Rising release reset voltage 2.56 2.61 2.66 V Falling interrupt voltage 2.50 2.55 2.60 V VLVDC2 LVIS1, LVIS0 = 0, 1 Rising release reset voltage 2.66 2.71 2.76 V Falling interrupt voltage 2.60 2.65 2.70 V VLVDC3 LVIS1, LVIS0 = 0, 0 Rising release reset voltage 3.68 3.75 3.82 V Falling interrupt voltage 3.60 3.67 3.74 V VLVDD0 VPOC2, VPOC1, VPOC0 = 0, 1, 1, falling reset voltage 2.70 2.75 2.81 V VLVDD1 LVIS1, LVIS0 = 1, 0 Rising release reset voltage 2.86 2.92 2.97 V Falling interrupt voltage 2.80 2.86 2.91 V VLVDD2 LVIS1, LVIS0 = 0, 1 Rising release reset voltage 2.96 3.02 3.08 V Falling interrupt voltage 2.90 2.96 3.02 V VLVDD3 LVIS1, LVIS0 = 0, 0 Rising release reset voltage 3.98 4.06 4.14 V Falling interrupt voltage 3.90 3.98 4.06 V 2.6.5 Power supply voltage rising slope characteristics (TA = −40 to +85°C, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Power supply voltage rising slope SVDD 54 V/ms Caution Make sure to keep the internal reset state by the LVD circuit or an external reset until VDD reaches the operating voltage range shown in 30.4 AC Characteristics. |
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