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R5F10DMGLFB 数据表(PDF) 1 Page - Renesas Technology Corp |
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R5F10DMGLFB 数据表(HTML) 1 Page - Renesas Technology Corp |
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1 / 139 page  RL78/D1A microcontrollers have a built-in sound generator which can set a volume level and tone frequency of 100 Hz to 6 kHz and has an automatic volume decrement function, up to four channels of stepper motor controller/driver which can set an 8-bit precision (pseudo 9-bit precision using a 1-bit addition function) pulse width (PWM output), and an LCD controller/driver which supports up to 216 segments. The 128-pin version has a built-in LCD bus interface and two channels of CAN, and expanded flash memory/RAM up to a maximum of 512 KB/24 KB, making these microcontrollers ideal for low-end instrument cluster. R01DS0463EJ0120 Rev. 1.20 Page 1 of 135 Mar 31, 2026 R01DS0463EJ0120 Rev. 1.20 Mar 31, 2026 RL78/D1A RENESAS MCU Datasheet 1. OUTLINE 1.1 Features Minimum instruction execution time can be changed from high speed (0.03125 μs: @ 32 MHz operation with high-speed on-chip oscillator clock) to ultra low-speed (30.5 μs: @ 32.768 kHz operation with subsystem clock) General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks) ROM: 24 to 512 KB RAM: 2 to 24 KB Data flash memory: 8 KB On-chip high-speed on-chip oscillator clocks Select from 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz (TYP.), 8 MHz (TYP.), and 4 MHz (TYP.) On-chip single-power-supply flash memory (with prohibition of block erase/writing function) Self-programming (with boot swap function/flash shield window function) On-chip debug function On-chip power-on-reset (POR) circuit and voltage detector (LVD) On-chip watchdog timer (operable with the dedicated low-speed on-chip oscillator clock) On-chip multiplier and divider/multiply-accumulator 16 bits × 16 bits = 32 bits (Unsigned or signed) 32 bits ÷ 32 bits = 32 bits (Unsigned) 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed) On-chip clock output/buzzer output controller On-chip BCD adjustment I/O ports: 38 to 112 CMOS I/O port: 35 to 107 (LED direct drive port: 9 to 16, N-ch OD selectable port: 4 to 6) CMOS input port: 5 CMOS output port: 0 to 1 Timer - 16-bit timer: 24 channels - Watchdog timer: 1 channel - Real-time clock: 1 channel - Interval timer: 1 channel Serial interface - CSI - UART (LIN-bus supported) - Simplified I2C communication - aFCAN controller Stepper motor controller/driver with zero point detection (ZPD): 1, 2, 4-channels LCD controller/driver (seg × com): 27 × 4, 39 × 4, 48 × 4, 53 × 4 and 54 × 4 LCD Bus I/F RESET output STOP status output Sound generator 8/10-bit resolution A/D converter (VDD = EVDD =2.7 to 5.5 V): 3+2 to 9+2 channels Standby function: HALT, STOP, SNOOZE mode Power supply voltage: VDD = 2.7 to 5.5 V Operating ambient temperature: J grade products TA = −40 to +85°C, L grade products TA = −40 to +105°C System Multiplier and divider, Multiply-accumulator DMA up to 4ch Ext. Oscillator 1 to 20 MHz Ext. Sub Oscillator 32.7 kHz External Interrupt up to 6ch Power On Reset (POR) Low Voltage Detector (LVD) On-Chip debug (Single-Wire) 16-bit CPU Cluster RL78 Core 32 MHz @TA = -40 to 85 OC 24 MHz @TA = -40 to 105 OC VDD = 2.7 V to 5.5 V CISC Harvard Architecture (3-stage Pipeline) Memory Code Flash up to 512 KB Safety RAM Parity Clock Monitor Window WDT RAM up to 24 KB Data Flash up to 8 KB LCD SEG × COM up to 54 × 4 Timers Timer Array Unit up to 16-bit × 24ch Real Time Clock (RTC) Four Register Banks 16-bit Barrel Shifter Memory CRC ADC self-diagnostic Int. high-speed oscillator up to 32 MHz Int. low-speed oscillator 15 kHz PLL up to 32 MHz Interval Timer 15-bit × 1ch Power Management HALT SNOOZE ADC STOP RAM on Interfaces up to 2 × CAN Serial Array Unit up to 3 × CSI (SPI) up to 1 × UART 1 × Simplified I2C up to 2 × LIN/UART Sound Generator PCL Analog 10-bit ADC up to 11ch Stepper Motor controller/ driver with ZPD × 4 RL78/D1A Block Diagram (Outline) Remark The functions mounted depend on the product. See 1.7 Outline of Functions. |
类似说明 - R5F10DMGLFB |
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