RZSLASHA1H datasheet(3/137 Pages) RENESAS

3 / 137 page

R01DS0479EJ0100 Rev.1.00

Page 3 of 137

Dec. 25, 2024

RZ/A1H Group, RZ/A1M Group

1. Overview

Multi-function timer pulse unit

 Maximum 16 lines of pulse inputs/outputs based on five channels of 16-bit timers

 18 output compare and input capture registers

 Input capture function

 Pulse output modes

 Toggle, PWM, complementary PWM, and reset-synchronized PWM modes

 Synchronization of multiple counters

 Complementary PWM output mode

—Non-overlapping waveforms output for 3-phase inverter control

—Automatic dead time setting

—0% to 100% PWM duty value specifiable

—A/D converter start request delaying function

—Interrupt skipping at crest or trough

 Reset-synchronized PWM mode

Three-phase PWM waveforms in positive and negative phases can be output with a required duty

value.

 Phase counting mode

Two-phase encoder pulse counting available

OS timer

 Two-channel 32-bit counters

 Two operating modes:

—Interval timer mode

—Free-running comparison mode

 DMA transfer request or interrupt request can be issued when a compare match occurs.

Realtime clock

 Internal clock, calendar function, alarm function

 Interrupts can be generated at intervals of 1/64 s by the 32.768-kHz or 4-MHz on-chip crystal

oscillator.

Serial communication

interface with FIFO

 Eight channels

 Clock synchronous mode or asynchronous mode selectable

 Simultaneous transmission and reception (full-duplex communication) supported

 Dedicated baud rate generator

 Separate 16-byte FIFO registers for transmission and reception

 Modem control function (channels 1, 5, and 7 in asynchronous mode)

Serial communication

interface

 Two channels

 Clock synchronous mode, asynchronous mode, or smart card interface mode is selectable.

 Simultaneous transmission and reception (full-duplex communication) supported

 Dedicated baud rate generator

 LSB first/MSB first selectable

 Modem control function

 Encoding and decoding of IrDA communications waveforms in accord with version 1.0 of the IrDA

standard (on channel 0)

Renesas serial peripheral

interface

 Five channels

 SPI operation

 Master mode and slave mode selectable

 Programmable bit length, clock polarity, and clock phase can be selected.

 Consecutive transfers

 MSB first/LSB first selectable

 Maximum transfer rate: 33.33 Mbps

SPI multi I/O bus controller

 Two channels

 Up to two serial flash memories with multiple I/O bus sizes (single/dual/quad) can be connected.

 External address space read mode (built-in read cache)

 SPI operating mode

 Clock polarity and clock phase can be selected.

 MSB first/LSB first selectable

 Maximum transfer rate: 533.33 Mbps (SDR transfer, with two serial flash memories connected)

I2C bus interface

 Four channels

 Master mode and slave mode supported

 Support for 7-bit and 10-bit slave address formats

 Support for multi-master operation

 Timeout detection

Items

Specification

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