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RZ/A1H 数据表(PDF) 10 Page - Renesas Technology Corp |
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RZ/A1H 数据表(HTML) 10 Page - Renesas Technology Corp |
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10 / 137 page ![]() R01DS0479EJ0100 Rev.1.00 Page 10 of 137 Dec. 25, 2024 RZ/A1H Group, RZ/A1M Group 1. Overview 1.2 Block Diagram This LSI has two main buses: the north main bus where peripheral modules are connected and the south main bus where on-chip RAM and external ROM and RAM are connected. Figure 1.1 is a schematic diagram of the internal buses. Figure 1.1 Schematic Diagram of LSI Internal Bus External ROM/RAM Cortex-A9 Bus masters Bus masters Bus bridge Peripheral modules On-chip RAM Bus controller This LSI North main bus South main bus |
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