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STA015 数据表(PDF) 10 Page - STMicroelectronics

部件名 STA015
功能描述  MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY
PDF  55 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA015 数据表(HTML) 10 Page - STMicroelectronics

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STA015 STA015B STA015T
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Init Mode
"PLAY" and "MUTE" changes are ignored in this mode. The internal state of the decoder will be updated
only when the decoder changes from the state "init" to the state "decode". The "init" phase ends when the
first decoded samples are at the output stage of the device.
Decode Mode
This mode is completely described by the following table:
Figure 7. MPEG Decoder Interface
Figure 8. Serial Input Interface Clocks
3.0 INTERFACE DESCRIPTION
3.1 Serial Input Interface
STA015 receives the input data (MSB first) through the Serial Input Interface (Fig.7). It is a serial commu-
nication interface connected to the SDI (Serial Data Input) and SCKR (Receiver Serial Clock).
The interface can be configured to receive data sampled on both rising and falling edge of the SCKR clock.
The BIT_EN pin, when set to low, forces the bitstream input interface to ignore the incoming data. For
PLAY
MUTE
Clock State
PCM Output
Decoding
0
0
Not Running
0
No
0
1
Running
0
No
1
0
Running
Decoded Samples
Yes
1
1
Running
0
Yes
DATA
SOURCE
µP
MPEG
DECODER
IIC
D98AU912
IIC
SDO
SCKT
LRCKT
SERIAL AUDIO INTERFACE
SDI
SCKR
BIT_EN
XTO
DAC
RX
TX
XTI
FILT
PLL
OCLK
SCL
SDA
DATA_REQ
SCLK_POL=0
SCLK_POL=4
DATA IGNORED
DATA VALID
SCKR
SCKR
SDI
BIT_EN
D98AU968A
DATA
IGNORED



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