SERCON816

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4

CONTROL REGISTERS AND RAM DATA STRUCTURES

4.1 Control Register Addresses

The following table is an overview of the control registers. The address is the word address which is input

by A6-1. To calculate the byte address, the value has to be multiplied by two. All control registers can be

written to and read (R/W), with the exception of the control bits that initiate an action (W).

The status registers can only be read (R). When control registers which contain bits that are not used or

can only be read, are written to, these bits can be set to 0 or 1; they are not evaluated internally. If control

registers are read with bits that are not used, these bits are set to 0.

4.2 Data Structures within the RAM

In this RAM the first eleven words have a fixed meaning.

The rest of the RAM can be divided into data structures as required.

4.2.1 Telegram Headers

A telegram header for receive telegram contains the following five control words:

A6-1

Bits

Name

R/W

Value

Function

00H

0-15

VERSION

R

0010H

Circuit code (0010H)

01H

- 2AH

0-15

Please refer to SERCON816 Reference Guide for a detailed description of the control registers.

A10-1

Contents

0-1

COMPT0-1: Start of transmission blocks 0-1

2-9

SCPT0-7: Address service containers 0-7

10

NMSTERR: Error counter MST

Index

Bit

Name

Function

0

0-7

ADR

Telegram address

8

DMA

Data storage in the internal RAM (DMA = 0) or DMA transfer (DMA = 1)

9

DBUF

Data in the RAM: single buffer (DBUF = 0) or double buffer (DBUF = 1)

10

VAL

For single buffering (DMA = 0, DBUF = 0) or DMA transfer (DMA = 1): telegram data

is invalid (VAL = 0) or valid (VAL = 1); for double buffering (DMA = 0, DBUF = 1): data

in buffer 0 (VAL = 0) or buffer 1 (VAL = 1) is valid. Modified by controller at beginning

and end of receive telegrams.

11

ACHK

Telegrams are received if the address is valid (ACHK = 1) or independent on the

received address (ACHK = 0). The received address is stored at ADR.

12

TCHK

The time of receiving is checked (TCHK = 1) or not checked (TCHK = 0).

13

RERR

The last telegram was free of error (RERR = 0) or errored or not received (RERR =

1).

14

0

Marker bit for telegram header of receive telegram.

15

0

Marker bit for telegram header.

1

0-15

TRT

Time for the start of telegram in

µs after end of MST.

2

0-15

TLEN

Length of telegram in data words (not including address).

3

0-10

PT

Word address within the RAM of the next telegram header or the end marker.

9-15

(Not used)

4

0-15

NERR

Error counter