TDA7590 datasheet(28/40 Pages) STMICROELECTRONICS

28 / 40 page

Appendix 1

TDA7590

28/40

; settings for the clock control register

;

321098765432109876543210

;INIT_PLL_CLKCTL EQU

$018cc1

INIT_PLL_CLKCTL EQU

%000000011000001011000001

; $018cc1

;

0001 --- DSPDF =1 (actual = DSPDF+1=3)

;

00 ------- TESTSEL

;

1 --------- DCKSRC (0:XTI; 1:FVCO)

;

1 ---------- DACLKEN (1: enable CODEC clocks)

;

0000010 ----------- MFSDF =2 (actual =MFSDF+1 = 3 )

;

011 ------------------ SEL (000:128,001:256, 010:384, etc)

;

0 --------------------- DSP_XTI (0:vco/DSPDF; 1:xti)

;

0 ---------------------- DAC_SEL (0:vco/MFSDF; 1:ext_dac_clk)

;

0 ----------------------- XTLD (0:Enabled; 1:Disabled)

ENDIF

; Settings per sci 115200

;------------------------------------------------------------------------

;

Timer Intitialisation values

;------------------------------------------------------------------------

;--- TCSR0 --------------------------------------------------------------------

; settings for the Timer Control/Status Register

;

321098765432109876543210

INIT_TCSR0

EQU

%000000001000101000000100

; $8A04

mode0 / trm=1 / tce=1 / pce=1/ dir=out

INIT_TCSR1

EQU

%000000001000101000000100

; $8A04

mode0 / trm=1 / tce=1 / pce=1/ dir=out

INIT_TCSR2

EQU

%000000001000101000000100

; $8A04

mode0 / trm=1 / tce=1 / pce=1/ dir=out

;

xx ----------------------->[23-22]; unused

;

0 ---------------------->[21]

TCF

; Timer Compare Flag

;

0 --------------------->[20]

TOF

; Timer Overflow Flag

;

xxxx ----------------->[19-16]

; unused

;

0 ---------------->[15]

PCE

; Prescaler Clock Enable

;

x --------------->[14]

; unused

;

0 -------------->[13]

; Data Output

;

0 ------------->[12]

; Data Input

;

1 ------------>[11]

DIR

; Direction

;

x ----------->[10]

; unused

;

1 ---------->[ 9]

TRM

; Timer Reload Mode

;

0 --------->[ 8]

INV

; Inverter

;

0000 ----->[7-4]

Tc[3-0]

; Timer Control =

Mode0

;

x ---->[ 3]

; unused

;

1 --->[ 2]

TCIE

; Timer Compare Interrupt Enable

;

0 -->[ 1]

TOIE

; Timer Overflow Enable

;

0 ->[ 0]

; Timer Enable

;--- TLR0 --------------------------------------------------------------------

; settings for the Timer Load Register

INIT_TLR0

EQU

$000000

INIT_TLR1

EQU

$000000

INIT_TLR2

EQU

$000000

;--- TCPR0 --------------------------------------------------------------------

; settings for the Timer Compare Register

;INIT_TCPR0

EQU

$000002

;INIT_TCPR1

EQU

$000004

;INIT_TCPR2

EQU

$000008

INIT_TCPR0

EQU

$000000

INIT_TCPR1

EQU

$000000

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