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ST7262 数据表(PDF) 13 Page - STMicroelectronics |
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ST7262 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 132 page  ST7262 13/132 Legend: x=undefined, R/W=read/write Notes: 1. The contents of the I/O port DR registers are readable only in output configuration. In input configura- tion, the values of the I/O pins are returned instead of the DR register contents. 2. The bits associated with unavailable pins must always be kept at their reset value. 0025h 0026h 0027h 0028h 0029h 002Ah 002Bh 002Ch 002Dh 002Eh 002Fh 0030h 0031h USB USBPIDR USBDMAR USBIDR USBISTR USBIMR USBCTLR USBDADDR USBEP0RA USBEP0RB USBEP1RA USBEP1RB USBEP2RA USBEP2RB USB PID Register USB DMA Address register USB Interrupt/DMA Register USB Interrupt Status Register USB Interrupt Mask Register USB Control Register USB Device Address Register USB Endpoint 0 Register A USB Endpoint 0 Register B USB Endpoint 1 Register A USB Endpoint 1 Register B USB Endpoint 2 Register A USB Endpoint 2 Register B x0h xxh x0h 00h 00h 06h 00h 0000 xxxxb 80h 0000 xxxxb 0000 xxxxb 0000 xxxxb 0000 xxxxb Read Only R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0032h to 0035h Reserved Area (4 Bytes) 0032h 0033h 0034h 0035h ITC ITSPR0 ITSPR1 ITSPR2 ITSPR3 Interrupt Software Priority Register 0 Interrupt Software Priority Register1 Interrupt Software Priority Register 2 Interrupt Software Priority Register 3 FFh FFh FFh FFh R/W R/W R/W R/W 0036h 0037h TBU TBUCV TBUCSR TBU Counter Value Register TBU Control/Status Register 00h 00h R/W R/W 0038h FLASH FCSR Flash Control/Status Register 00h R/W 0039h ITRFRE2 Interrupt Register 2 00h R/W 003Ah to 003Fh Reserved Area (6 Bytes) Address Block Register Label Register Name Reset Status Remarks |
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