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ST90135 数据表(PDF) 56 Page - STMicroelectronics |
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ST90135 数据表(HTML) 56 Page - STMicroelectronics |
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56 / 190 page  56/190 ST90158 - INTERRUPTS EXTERNAL INTERRUPTS (Cont’d) Figure 26. External Interrupts Control Bits and Vectors n n INT A0 request VECTOR Priority level Mask bit Pending bit IMA0 IPA0 V7 V6 V5 V4 0 00 0 “0” “1” IA0S Watchdog/Timer End of count INT 0 pin INT A1 request TEA1 INT 1 pin INT B0 request INT 2 pin INT B1 request TEB1 INT 3 pin INT C0 request INT 4 pin INT C1 request TEC1 INT 5 pin INT D0 request TED0 INT 6 pin INT D1 request TED1 INT 7 pin VECTOR Priority level Mask bit Pending bit IMA1 IPA1 V7 V6 V5 V4 0 0 1 0 1 V7 V6 V5 V4 0 1 0 0 V7 V6 V5 V4 0 11 0 V7 V6 V5 V4 1 00 0 V7 V6 V5 V4 10 1 0 V7 V6 V5 V4 1 1 0 0 V7 V6 V5 V4 1 11 0 VECTO R Priority level VECTOR Priority level VECTO R Priority level VECTOR Priority level VECTOR Priority level VECTOR Priority level Mask bit IMB0 Pending bit IPB0 Pending bit IPB1 Pending bit IPC0 Pending bit IPC1 Pending bit IPD0 Pending bit IPD1 Mask bit IMB1 Mask bit IMC0 Mask bit IMC1 Mask bit IMD0 Mask bit IMD1 * Shared channels, see warning * * SPEN,BM S SPI Interrupt INTS STD Timer “1” “0” INT_SEL RCCU “0” “1” TEA 0 TEC0 TEB 0 * * “0,0” PL2A PL1A 1 PL2C PL1C 0 PL2B PL1B 0 PL2A PL1A 1 PL2B PL1B 0 PL2C PL1C 0 PL2D PL1D 1 PL2D PL1D 9 |
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