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T80C5112-RKSCV 数据表(PDF) 64 Page - ATMEL Corporation |
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T80C5112-RKSCV 数据表(HTML) 64 Page - ATMEL Corporation |
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64 / 97 page  64 Rev. B - November 10, 2000 Preliminary T80C5112 Table 38. ADDL Register ADDL (S:F4h Read Only) ADC Data Low byte register Read only register Reset Value: xxxx xx00b Table 39. ADCF Register ADCF (S:F6h) ADC Input Select Register Reset Value=0000 0000b 7 6 5 4 3 2 1 0 ------ ADAT 1 ADAT 0 Bit Number Bit Mnemonic Description 7-6 - Reserved The value read from these bits are indeterminate. Do not set these bits. 1-0 ADAT1:0 ADC result bits 1-0 7 6 5 4 3 2 1 0 SEL7 SEL6 SEL5 SEL4 SEL3 SEL2 SEL1 SEL0 Bit Number Bit Mnemonic Description 7-0 SEL7-0 Select Input 7-0 Set to select bit 7-0 as possible input for A/D Cleared to leave this bit free for other function |
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