T80C5112-RKSCV datasheet(65/97 Pages) ATMEL

65 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

15. Interrupt System

The T80C5112 has a total of 8 interrupt vectors: two external interrupts (INT0 and INT1), two timer interrupts

(timers 0, 1), serial port interrupt, PCA, SPI and A/D. These interrupts are shown in Figure 32..

Figure 32. Interrupt Control System

Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit in the Interrupt

Enable register (See Table 42.). This register also contains a global disable bit, which must be cleared to disable

all interrupts at once.

Each interrupt source can also be individually programmed to one of four priority levels by setting or clearing a

bit in the Interrupt Priority register (See Table 44.) and in the Interrupt Priority High register (See Table 46.).

Table 40. shows the bit values and priority levels associated with each combination.

IE1

High priority

interrupt

Interrupt

polling

sequence

Low priority

interrupt

Global

disable

Individual

enable

TF0

INT0

INT1

TF1

IPH, IP

IE0

SPI

ADC

CCFx

PCA

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