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ADE3800XT 数据表(PDF) 123 Page - STMicroelectronics |
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ADE3800XT 数据表(HTML) 123 Page - STMicroelectronics |
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123 / 138 page ![]() 123/138 ADE3800 Register Description by Block They are all LSB aligned, except for OMUX which is MSB aligned. When the RAM width is not a multiple of 8, zeros will be returned for the non-meaningful bits. Example of LSB aligned RAM If addresses 9000-9005 are written with the values F0-F5, the contents of SCL_RAM_1 (at word address 0) are as follows: A read from address 9000 will return F0; a read from address 9001 will return F1, etc. Note: A read from 9005 returns the value 01 (as opposed to F5) since there are only 2 meaningful bits of data at this address. Example of MSB aligned RAM (OMUX only) If addresses E300-E305 are written with the values F0-F5 respectively, the contents of the OMUX RAM (at word address 0) are as follows: A read from address E300 will return F0, a read from address E301 will return F1, and so on. 32-bit values 24-bit values 16-bit values _0 LSB _L or _0 LSB _L LSB _1 _M or _1 MSB _U USB _2 _U or _2 USB _3 USB [41:40] [39:32] [31:24] [23:16] [15:8] [7:0] 01 F4 F3 F2 F1 F0 [47:40] [39:32] [31:24] [23:16] [15:8] [7:0] F0 F1 F2 F3 F4 F5 |
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