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ADE3800SXT 数据表(PDF) 53 Page - STMicroelectronics

部件名 ADE3800SXT
功能描述  Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters
PDF  138 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ADE3800SXT 数据表(HTML) 53 Page - STMicroelectronics

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ADE3800
Register Description by Block
4.10 Scale (SCL)
ADE scales input video to output panel resolution without external video frame memory. This
requires tuning of the panel timing parameters to make the vertical active time match the panel’s.
Features:
Separable 3V x 4H polyphase filter:
— 3 line filter for H resolutions <= 1024
— 2 line filter for H resolutions > 1024
independent H & V kernel register storage
— 64 phases are interpolated from 6V or 10H reference points
— symmetric kernels only
— coefficients range from –2 to +1 63/64
Simple pointer collision feedback mechanism
2-way 3
rd generation context sensitive filtering
DMEAS_DATA_0
090E
R
[7:0]
00
Refer to Table 22 below
DMEAS_DATA_1
090F
R
[7:0]
00
DMEAS_DATA_2
0910
R
[7:0]
00
DMEAS_DATA_3
0911
R
[7:0]
00
DMEAS_DATA_4
0912
R
[7:0]
00
DMEAS_DATA_5
0913
R
[7:0]
00
DMEAS_DATA_6
0914
R
[7:0]
00
DMEAS_DATA_7
0915
R
[7:0]
00
Table 22: DMEAS Output Registers Assignment
alg_sel = 00
alg_sel = 01
alg_sel = 10
alg_sel = 11
DMEAS_DATA_0
edge_out [7:0]
min_out [7:0]
hpos_min [7:0]
de_size_out [7:0]
DMEAS_DATA_1
edge_out [15:8]
max_out [7:0]
hpos_min [11:8]
de_size_out [15:8]
DMEAS_DATA_2
edge_out [23:16]
pcd_out [7:0]
hpos_max [7:0]
de_mismatch_flag
DMEAS_DATA_3
edge_out [31:24]
pcd_out [15:8]
hpos_max [11:8]
N/A
DMEAS_DATA_4
psum_out [7:0]
pcd_out [23:16]
vpos_min [7:0]
N/A
DMEAS_DATA_5
psum_out [15:8]
N/A
vpos_min [11:8]
N/A
DMEAS_DATA_6
psum_out [23:16]
N/A
vpos_max [7:0]
N/A
DMEAS_DATA_7
psum_out [31:24]
N/A
vpos_max [11:8]
N/A
Table 21: DMEAS Registers (Sheet 3 of 3)
Register Name
Addr
Mode
Bits
Rst
Description



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