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ADE3800SXT 数据表(PDF) 19 Page - STMicroelectronics |
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ADE3800SXT 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 138 page ![]() 19/138 ADE3800 Register Description by Block GLBL_CLK_INV 0003 R/W [4] 00 AFE_CLK_INV: invert ADC sample clock [3] OUTCLK_INV: invert output clock [2] SCLK_INV: invert SCLK [1] DOTCLK_INV: invert DOTCLK [0] INCLK_INV: invert INCLK GLBL_CLK_ENAB_0 0004 R/W [7] FF DOTCLK_FLK_EN: enable DOTCLK to the FLK block [6] DOTCLK_OSD_EN: enable DOTCLK to the OSD block [5] DOTCLK_PGEN_EN: enable DOTCLK to the PGEN block [4] DOTCLK_EN: enable DOTCLK upstream of FLK, OSD, and PGEN enable [3] INCLK_DFT_EN: enable INCLK to DFT test circuits [2] INCLK_DMEAS_EN: enable INCLK to DMEAS block [1] INCLK_EN: enable INCLK upstream of DMEAS and DFT enable [0] ALL_VIDEO_CLK_EN: override block enable (FLK, OSD, PGEN, DFT, DMEAS) for test GLBL_CLK_ENAB_1 0005 R/W [1] 03 OUTCLK_EN: enable output clock [0] SCLK_EN: enable scaler clock GLBL_SRST_0 0006 R/W [7] 00 TCON_SRST: reset the TCON block [6] SCL_SRST: reset the SCALER block [5] SMUX_SRST: reset the SMUX block [4] DMEAS_SRST: reset the DMEAS block [3] SMEAS_SRST: reset the SMEAS block [2] SRT_SRST: reset the SRT block [1] ADTH_SRST: reset the ADTH block [0] ADC_SRST: reset the digital logic in the ADC block GLBL_SRST_1 0007 R/W [7] 00 DFT_SRST: reset DFT (test) circuits [6] OMUX_SRST: reset the OMUX block [5] APC_SRST: reset the APC block [3] OSD_SRST: reset the OSD block [1] PGEN_SRST: reset the PGEN block [0] OSQ_SRST: reset the OSQ portion of the SCALER block GLBL_I2C_CTRL 0008 R/W [2] 00 I2C_AUTO_INC_OFF: disable I2C autoincrement [1] I2C_SDA_PMOS_ON: SDA PMOS enable c [0] BYPASS_I2C_FILTER: bypass antiglitch filter GLBL_BPAD_EN 0009 R/W [7:0] 03 Reserved GLBL_COMP_CTRL 000A R/W [0] 01 COMPEN_EN: enable slew-rate compensation GLBL_XTAL_CTRL 000B R/W [0] 01 I2C_MUXA_XTAL_EN: enable the crystal oscillator d GLBL_TST_CTRL 000C R/W [7:0] 00 Reserved Table 9: Global Control Registers (Sheet 2 of 3) Register Name Addr Mode Bits Rst Description |
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