L6756D datasheet(8/36 Pages) STMICROELECTRONICS

8 / 36 page

Pins description and connection diagrams

L6756D

8/36

Pins description and connection diagrams

Figure 5.

Pins connection (top view)

2.1

Pin descriptions

Table 2.

Pin description

Pin#

Name

Function

1EN

VR enable. Internally pulled-up by 10

μA to 3.3 V.

Pull-low to disable the device, set free or pull up above turn-on threshold to

enable the controller.

2 to 9

VID0 to

VID7

Voltage IDentification pins.

3.3 V compatible, they allow programming output voltage as specified in

Table 6 and Table 7 according to VR10/1 pin status.

PSI# / VR10

According to the status of PSI_A, the functionality of this pin changes as

below:

PSI#: Power state indicator input. Connect to the PSI# pin on the CPU to

manage low-power state. When asserted (pulled low), the controller will act as

programmed on the PSI_A pin.

VR10: It allows selecting between VR10 (short to SGND, See Table 6) or VR11

(floating, See Table 7) DACs.

By connecting a resistor RSS to GND, it allows programming the soft-start time.

soft-start time TSS will proportionally change with a gain of

18.52 [µs / k

Ω]. Connect 27 kΩ resistor to program T2 = 500 µs. The same

slope implemented to reach VBOOT has to be considered also when the

reference moves from VBOOT to the programmed VID code. The pin is kept to a

fixed 1.24 V.

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