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L6756D 数据表(PDF) 10 Page - STMicroelectronics |
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L6756D 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 36 page ![]() Pins description and connection diagrams L6756D 10/36 28 CS4 Channel 4 current sense positive input. Connect through an R-C filter to the phase-side of the channel 4 inductor. When working at 2 or 3 phase, short to the regulated voltage. 29 DRVON External driver enable. CMOS output used to control the external driver status: pulled-low to manage HiZ conditions or pulled-high for normal driver switching. 30 to 33 G1 to G4 PWM outputs. Connect to external drivers PWM inputs. The device is able to manage HiZ status by setting the pins floating. By shorting to GND G4 or G2 and G4, it is possible to program the device to work at 3 or 2 phase respectively. 34 VREF This pin provide a 2.5 V reference. Filter with 1 nF (max) to SGND. 35 GND All the internal references are referred to this pin. Connect to the PCB signal ground. 36 VCC Device power supply. Operative voltage is 12 V ±15 %. Filter with at least 1 μF MLCC vs. ground. 37 VR_RDY Open drain output set free after SS has finished and pulled low when triggering any protection. Pull up to a voltage lower than 3.3 V (typ), if not used it can be left floating. 38 LTB_GAIN Load transient boost technology ® gain pin. See Section 9.2 for details. 39 PSI_A PSI action configuration pin. This pins configures the functionality of the PSI# / VR10 pin according to Table 9 as follow: VR10: Short to SGND to configure the VID_SEL functionality. The controller will not manage low power-states but will be backward compatible with VR10 / VR11 platforms. PSI#: The device will work in VR11 mode and perform low power-states management through the PSI# pin. See Section 7 for details. 40 IMON Current monitor output. A current proportional to the read current is sourced from this pin. Connect through a resistor RMON to FBG to implement a load indicator. Connect the load indicator directly to VR11.1 CPUs.The pin voltage is clamped to 1.1V max to preserve the CPU from excessive voltages. Thermal pad Thermal pad connects the silicon substrate and makes good thermal contact with the PCB. Connect to the PGND plane. Table 2. Pin description (continued) Pin# Name Function |
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