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HD6417618 数据表(PDF) 412 Page - Renesas Technology Corp

部件名 HD6417618
功能描述  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD6417618 数据表(HTML) 412 Page - Renesas Technology Corp

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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 380 of 610
REJ09B0131-0600
Receiving Serial Data (Synchronous Mode): Figure 14.15 shows a sample flowchart for
receiving serial data. When switching from asynchronous mode to synchronous mode without
SCIF initialization, make sure that ORER, PER, and FER are cleared to 0.
Start of reception
Read ORER flag in SCLSR
ORER = 1?
Read RDF flag in SCFSR
RDF = 1?
Read receive data in
SCFRDR, and clear RDF
flag in SCFSR to 0
All data received?
Clear RE bit in SCSCR to 0
End of reception
Yes
No
Yes
Yes
No
No
Error handling
[1] Receive error handling:
Read the ORER flag in SCLSR to
identify any error, perform the appropriate
error handling, then clear the ORER flag
to 0. Transmission/reception cannot be
resumed while the ORER flag is set to 1.
[2] SCIF status check and receive data read:
Read SCFSR and check that RDF = 1,
then read the receive data in SCFRDR,
and clear the RDF flag to 0. The transition
of the RDF flag from 0 to 1 can also be
identified by an RXI interrupt.
[3] Serial reception continuation procedure:
To continue serial reception, read at least
the receive trigger set number of receive
data bytes from SCFRDR, read 1 from the
RDF flag, then clear the RDF flag to 0.
The number of receive data bytes in
SCFRDR can be ascertained by reading
SCFRDR.
[1]
[2]
[3]
Figure 14.15 Sample Flowchart for Receiving Serial Data (1)
Error handling
Clear ORER flag in SCLSR to 0
End
Overrun error handling
ORER = 1?
Yes
No
Figure 14.16 Sample Flowchart for Receiving Serial Data (2)



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