HD6417618 datasheet(25/646 Pages) RENESAS

25 / 646 page

Rev. 6.00 Jun. 12, 2007 Page xxv of xxxii

Section 17 I/O Ports

Figure 17.1 Port A ...................................................................................................................... 457

Figure 17.2 Port B ...................................................................................................................... 459

Figure 17.3 Port C ...................................................................................................................... 461

Figure 17.4 Port D ...................................................................................................................... 464

Figure 17.5 Port E....................................................................................................................... 466

Section 18 User Break Controller (UBC)

Figure 18.1 Block Diagram of UBC........................................................................................... 472

Section 19 User Debugging Interface (H-UDI)

Figure 19.1 Block Diagram of H-UDI........................................................................................ 494

Figure 19.2 TAP Controller State Transitions ............................................................................ 504

Figure 19.3 H-UDI Data Transfer Timing.................................................................................. 506

Figure 19.4 H-UDI Reset............................................................................................................ 506

Section 21 Electrical Characteristics

Figure 21.1 External Clock Input Timing................................................................................... 546

Figure 21.2 CKIO and CK_PHY Clock Output Timings ........................................................... 546

Figure 21.3 Oscillation Settling Timing after Power-On............................................................ 547

Figure 21.4 Oscillation Settling Timing after Standby Mode (By Reset)................................... 547

Figure 21.5 Oscillation Settling Timing after Standby Mode (By NMI or IRQ)........................ 547

Figure 21.6 PLL Synchronize Settling Timing By Reset or NMI .............................................. 548

Figure 21.7 Reset Input Timing.................................................................................................. 549

Figure 21.8 Interrupt Input Timing............................................................................................. 550

Figure 21.9 Pin Drive Timing in Standby Mode ........................................................................ 550

Figure 21.10 Basic Bus Timing: No Wait Cycle ........................................................................ 553

Figure 21.11 Basic Bus Timing: One Software Wait Cycle ....................................................... 554

Figure 21.12 Basic Bus Timing: One External Wait Cycle ........................................................ 555

Figure 21.13 Basic Bus Timing: One Software Wait Cycle, External Wait Enabled

(WM Bit = 0), No Idle Cycle ................................................................................ 556

Figure 21.14 Byte Control SRAM Timing: SW = 1 Cycle, HW = 1 Cycle,

One Asynchronous External Wait Cycle, CSnWCR.BAS = 0

(UB-/LB-Controlled Write Cycle) ........................................................................ 557

Figure 21.15 Byte Control SRAM Timing: SW = 1 Cycle, HW = 1 Cycle,

One Asynchronous External Wait Cycle, CSnWCR.BAS = 1

(WE-Controlled Write Cycle) ............................................................................... 558

Figure 21.16 Synchronous DRAM Single Read Bus Cycle

(Auto-Precharge, CAS Latency = 2, WTRCD = 0 Cycle, WTRP = 0 Cycle)...... 559

Figure 21.17 Synchronous DRAM Single Read Bus Cycle

(Auto-Precharge, CAS Latency = 2, WTRCD = 1 Cycle, WTRP = 1 Cycle)...... 560

HD6417618 数据表(PDF) 25 Page - Renesas Technology Corp

HD6417618 数据表(HTML) 25 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载