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HD6417618 数据表(PDF) 52 Page - Renesas Technology Corp |
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HD6417618 数据表(HTML) 52 Page - Renesas Technology Corp |
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52 / 646 page ![]() Section 2 CPU Rev. 6.00 Jun. 12, 2007 Page 20 of 610 REJ09B0131-0600 31 0 R0*1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15, SP (hardware stack pointer)0*2 31 9 8 7 6 5 4 3 2 1 0 0 0 31 M GBR 31 VBR QI3 I2 I1 I0 S T 31 0 MACH 31 0 PR 31 0 PC MACL Notes: 1. R0 can be used as an index register in index register indirect or index GBR indirect addressing mode. For some instructions, only R0 is used as the source or destination register. 2. R15 is used as a hardware stack pointer during exception handling. General register (Rn) Status register (SR) Global base register (GBR) Vector base register (VBR) Multiply and accumulate register (MAC) Procedure register (PR) Program counter (PC) Figure 2.1 CPU Internal Register Configuration |
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