MPR083

Sensors

6

Freescale Semiconductor

Preliminary

2.3.2

Start and Stop Conditions

Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S)

condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave,

it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another

transmission.

Figure 6. Start and Stop Conditions

2.3.3

Bit Transfer

One data bit is transferred during each clock pulse (Figure 7). The data on SDA must remain stable while SCL is high.

Figure 7. Bit Transfer

2.3.4

Acknowledge

the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is

transmitting to the MPR083, the MPR083 generates the acknowledge bit because the MPR083 is the recipient. When the

MPR083 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.

Figure 8. Acknowledge

DATA LINE STABLE

DATA VALID

CHANGE OF

DATA ALLOWED

SDA

SCL

START

CONDITION

SDA

SCL

STOP

CONDITION

P

S

START

CONDITION

SDA

BY TRANSMITTER

S

12

8

9

CLOCK PULSE FOR

ACKNOWLEDGEMENT

SDA

BY RECEIVER

SCL