MPR083

Sensors

14

Freescale Semiconductor

Preliminary

4.7

Configuration Register

of the Configuration Register is 0x0A.

Figure 17. Configuration Register

4.8

Attention Pin

The Attention (ATTN) pin allows a user to externally set the Configuration Register’s DCE bit high. This is latched on a high to

low transition. Since the current mode of the device is enabled through the DCE this will cause duty cycling to be disabled and

change the current mode from Run2 to Run1, or Stop2 to Stop1 (depending on the previous state).

7

6

543210

R

RST

0

DCE

IRQEN

RUNE

W

Reset:

0

0

010100

= Unimplemented

Table 10. Configuration Register Field Descriptions

Field

Description

7:5

IRQR

Interrupt Rate – The Interrupt Rate Field selects the amount to multiply the MTP by

to determine the minimum delay between sequential Interrupts.

000 Encoding 0 – Sets the IRQR multiplication factor to 1

~

111 Encoding 7 – Sets the IRQR multiplication factor to 8

4

RST

Reset – Asserts a global reset of the sensor controller.

0 Reset Asserted

1 Reset Not Asserted

2

DCE

Duty Cycle Enable – The Duty Cycle Enable bit enables or disables duty cycling on

the MPR083. This bit is active low.

0 Duty Cycle Enabled (2 modes)

1 Duty Cycle Disabled (1 modes)

1

IRQEN

Interrupt Enable – The Interrupt Enable bit enables or disables the IRQ

Functionality.

0 IRQ Disabled

1 IRQ Enabled

0

RUNE

Run Mode Enable – The Run Mode Enable bit enables or disables scanning of the

electrodes for touch detection. This bit is active high.

0 Electrode Scanning Disabled (Stop modes)

1 Electrode Scanning Enabled (Run modes)