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CS42436 数据表(PDF) 22 Page - Cirrus Logic |
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CS42436 数据表(HTML) 22 Page - Cirrus Logic |
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22 / 61 page ![]() 22 DS647F2 CS42436 SWITCHING CHARACTERISTICS - AUX PORT (Inputs: Logic 0 = DGND, Logic 1 = VLS.) Parameters Symbol Min Max Units Master Mode Output Sample Rate (AUX_LRCK) All Speed Modes Fs - LRCK kHz AUX_SCLK Frequency - 64 ·LRCK kHz AUX_SCLK Duty Cycle 45 55 % AUX_LRCK Edge to SCLK Rising Edge tlcks -5 ns AUX_SDIN Setup Time Before SCLK Rising Edge tds 3- ns AUX_SDIN Hold Time After SCLK Rising Edge tdh 5- ns AUX_SDIN AUX_SCLK AUX_LRCK t sckh t sckl t lcks t ds MSB t dh MSB-1 Figure 6. Serial Audio Interface Slave Mode Timing |
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