AT91SAM9261 datasheet(38/43 Pages) ATMEL

38 / 43 page

6062KS–ATARM–15-Jan-09

AT91SAM9261 Preliminary

10.13 USB

• USB Host Port:

– Compliance with Open HCI Rev 1.0 specification

– Compliance with USB V2.0 Full-speed and Low-speed Specification

– Supports both Low-speed 1.5 Mbps and Full-speed 12 Mbps USB devices

– Root hub integrated with two downstream USB ports

– Two embedded USB transceivers

– No overcurrent detection

– Supports power management

– Operates as a master on the Bus Matrix

• USB Device Port:

– USB V2.0 full-speed compliant, 12 Mbits per second

– Embedded USB V2.0 full-speed transceiver

– Embedded dual-port RAM for endpoints

– Suspend/Resume logic

– Ping-pong mode (two memory banks) for isochronous and bulk endpoints

– Six general-purpose endpoints:

Endpoint 0: 8 bytes, no ping-pong mode

Endpoint 1, Endpoint 2: 64 bytes, ping-pong mode

Endpoint 3: 64 bytes, no ping-pong mode

Endpoint 4, Endpoint 5: 256 bytes, ping-pong mode

• Embedded pad pull-up configurable via USB_PUCR Register located in the MATRIX user

interface

10.14 LCD Controller

• Single and Dual scan color and monochrome passive STN LCD panels supported

• Single scan active TFT LCD panels supported.

• 4-bit single scan, 8-bit single or dual scan, 16-bit dual scan STN interfaces supported

• Up to 24-bit single scan TFT interfaces supported

• Up to 16 gray levels for mono STN and up to 4096 colors for color STN displays

• 1, 2 bits per pixel (palletized), 4 bits per pixel (non-palletized) for mono STN

• 1, 2, 4, 8 bits per pixel (palletized), 16 bits per pixel (non-palletized) for color STN

• 1, 2, 4, 8 bits per pixel (palletized), 16, 24 bits per pixel (non-palletized) for TFT

• Single clock domain architecture

• Resolution supported up to 2048 x 2048

AT91SAM9261 数据表(PDF) 38 Page - ATMEL Corporation

AT91SAM9261 数据表(HTML) 38 Page - ATMEL Corporation

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