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CS2300-CP 数据表(PDF) 18 Page - Cirrus Logic

部件名 CS2300-CP
功能描述  Fractional-N Clock Multiplier with Internal LCO
PDF  32 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS2300-CP 数据表(HTML) 18 Page - Cirrus Logic

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CS2300-CP
18
DS843F1
Ratio modifiers which would produce an overflow or truncation of REFF should not be used; For example
if RUD is 1024 an RMOD of 8 would produce an REFF value of 8192 which exceeds the 4096 limit of the
12.20 format. In all cases, the maximum and minimum allowable values for REFF are dictated by the fre-
quency limits for both the input and output clocks as shown in the “AC Electrical Characteristics” on
page 7.
5.3.4
Ratio Configuration Summary
The RUD is the user defined ratio stored in the register space. The resolution for the RUD is selectable by
setting LFRatioCfg. R-Mod is applied if selected. The user defined ratio, and ratio modifier make up the
effective ratio REFF, the final calculation used to determine the output to input clock ratio. The conceptual
diagram in Figure 15 summarizes the features involved in the calculation of the ratio values used to gen-
erate the fractional-N value which controls the Frequency Synthesizer.
Figure 15. Ratio Feature Summary
Referenced Control
Register Location
Ratio...................................... “Ratio (Address 06h - 09h)” on page 26
LFRatioCfg ............................ “Low-Frequency Ratio Configuration (LFRatioCfg)” on page 28
RModSel[2:0] ........................ “R-Mod Selection (RModSel[2:0])” section on page 25
Effective Ratio REFF
Ratio Format
Frequency Reference Clock
(CLK_IN)
PLL Output
Frequency
Synthesizer
Digital PLL &
Fractional N Logic
N
Ratio
12.20
20.12
LFRatioCfg
RModSel[2:0]
Ratio
Modifier
LCO
User Defined Ratio RUD



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