数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

MCP3421 数据表(PDF) 24 Page - Microchip Technology

部件名 MCP3421
功能描述  18-Bit Analog-to-Digital Converter with I2C Interface and On-Board Reference
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP3421 数据表(HTML) 24 Page - Microchip Technology

Back Button MCP3421 Datasheet HTML 20Page - Microchip Technology MCP3421 Datasheet HTML 21Page - Microchip Technology MCP3421 Datasheet HTML 22Page - Microchip Technology MCP3421 Datasheet HTML 23Page - Microchip Technology MCP3421 Datasheet HTML 24Page - Microchip Technology MCP3421 Datasheet HTML 25Page - Microchip Technology MCP3421 Datasheet HTML 26Page - Microchip Technology MCP3421 Datasheet HTML 27Page - Microchip Technology MCP3421 Datasheet HTML 28Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 24 / 42 page
background image
MCP3421
DS22003E-page 24
© 2009 Microchip Technology Inc.
TABLE 5-4:
I2C SERIAL TIMING SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, all limits are specified for T
A = -40 to +85°C,
VIN+ = VIN- = VREF/2, VSS = 0V, VDD = +2.7V to +5.0V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Standard Mode (100 kHz)
Clock frequency
fSCL
100
kHz
Clock high time
THIGH
4000
ns
Clock low time
TLOW
4700
ns
SDA and SCL rise time
TR
1000
ns
From VIL to VIH (Note 1)
SDA and SCL fall time
TF
300
ns
From VIH to VIL (Note 1)
START condition hold time
THD:STA
4000
ns
START (Repeated) condition
setup time
TSU:STA
4700
ns
Data hold time
THD:DAT
0
3450
ns
(
Note 3)
Data input setup time
TSU:DAT
250
ns
STOP condition setup time
TSU:STO
4000
ns
Output valid from clock
TAA
0
3750
ns
(
Note 2, Note 3)
Bus free time
TBUF
4700
ns
Time between START and
STOP conditions.
Fast Mode (400 kHz)
Clock frequency
TSCL
400
kHz
Clock high time
THIGH
600
ns
Clock low time
TLOW
1300
ns
SDA and SCL rise time
TR
20 + 0.1Cb
300
ns
From VIL to VIH (Note 1)
SDA and SCL fall time
TF
20 + 0.1Cb
300
ns
From VIH to VIL (Note 1)
START condition hold time
THD:STA
600
ns
START (Repeated) condition
setup time
TSU:STA
600
ns
Data hold time
THD:DAT
0
900
ns
(
Note 4)
Data input setup time
TSU:DAT
100
ns
STOP condition setup time
TSU:STO
600
ns
Output valid from clock
TAA
0
1200
ns
(
Note 2, Note 3)
Bus free time
TBUF
1300
ns
Time between START and
STOP conditions.
Note 1: This parameter is ensured by characterization and not 100% tested.
2: This specification is not a part of the I2C specification. This specification is equivalent to the Data Hold
Time (THD:DAT) plus SDA Fall (or rise) time: TAA = THD:DAT + TF (OR TR).
3: If this parameter is too short, it can create an unintended Start or Stop condition to other devices on the
bus line. If this parameter is too long, Clock Low time (TLOW) can be affected.
4: For Data Input: This parameter must be longer than t
SP. If this parameter is too long, the Data Input Setup
(TSU:DAT) or Clock Low time (TLOW) can be affected.
For Data Output: This parameter is characterized, and tested indirectly by testing TAA parameter.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com