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MCP3422 数据表(PDF) 22 Page - Microchip Technology |
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MCP3422 数据表(HTML) 22 Page - Microchip Technology |
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22 / 58 page ![]() MCP3422/3/4 DS22088C-page 22 © 2009 Microchip Technology Inc. 5.3.4 READING OUTPUT CODES AND CONFIGURATION BYTE FROM THE DEVICE When the Master sends a read command (R/W = 1), the device outputs both the conversion data and configuration bytes. Each byte consists of 8 bits with one acknowledge (ACK) bit. The ACK bit after the address byte is issued by the device and the ACK bits after each conversion data bytes are issued by the Master. When the device is configured for 18-bit conversion mode, it outputs three data bytes followed by a configuration byte. The first 6 data bits in the first data byte are repeated MSB (= sign bit) of the conversion data. The user can ignore the first 6 data bits, and take the 7th data bit (D17) as the MSB of the conversion data. The LSB of the 3rd data byte is the LSB of the conversion data (D0). If the device is configured for 12, 14, or 16 bit-mode, the device outputs two data bytes followed by a configuration byte. In 16 bit-conversion mode, the MSB (= sign bit) of the first data byte is D15. In 14-bit conversion mode, the first two bits in the first data byte are repeated MSB bits and can be ignored, and the 3rd bit (D13) is the MSB (=sign bit) of the conversion data. In 12-bit conversion mode, the first four bits are repeated MSB bits and can be ignored. The 5th bit (D11) of the byte represents the MSB (= sign bit) of the conversion data. Table 5-3 summarizes the conversion data output of each conversion mode. The configuration byte follows the output data bytes. The device repeatedly outputs the configuration byte only if the Master sends clocks repeatedly after the data bytes. The device terminates the current outputs when it receives a Not-Acknowledge (NAK), a repeated start or a stop bit at any time during the output bit stream. It is not required to read the configuration byte. However, the Master may read the configuration byte to check the RDY bit condition.The Master may continuously send clock (SCL) to repeatedly read the configuration byte (to check the RDY bit status). Figures 5-4 and 5-5 show the timing diagrams of the reading. TABLE 5-3: OUTPUT CODES OF EACH RESOLUTION OPTION Conversion Option Digital Output Codes 18-bits MMMMMMD17D16 (1st data byte) - D15 ~ D8 (2nd data byte) - D7 ~ D0 (3rd data byte) - Configuration byte. (Note 1) 16-bits D15 ~ D8 (1st data byte) - D7 ~ D0 (2nd data byte) - Configuration byte. (Note 2) 14-bits MMD13D ~ D8 (1st data byte) - D7 ~ D0 (2nd data byte) - Configuration byte. (Note 3) 12-bits MMMMD11 ~ D8 (1st data byte) - D7 ~ D0 (2nd data byte) - Configuration byte. (Note 4) Note 1: D17 is MSB (= sign bit), M is repeated MSB of the data byte. 2: D15 is MSB (= sign bit). 3: D13 is MSB (= sign bit), M is repeated MSB of the data byte. 4: D11 is MSB (= sign bit), M is repeated MSB of the data byte. |
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