| 数据搜索系统,热门电子元器件搜索 |
|
MCP3422 数据表(PDF) 12 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MCP3422 数据表(HTML) 12 Page - Microchip Technology |
|
12 / 58 page ![]() MCP3422/3/4 DS22088C-page 12 © 2009 Microchip Technology Inc. FIGURE 3-1: Equivalent Analog Input Circuit. 3.3 Serial Clock Pin (SCL) SCL is the serial clock pin of the I2C interface. The device act only as a slave and the SCL pin accepts only external serial clocks. The input data from the Master device is shifted into the SDA pin on the rising edges of the SCL clock and output from the slave device occurs at the falling edges of the SCL clock. The SCL pin is an open-drain N-channel driver. Therefore, it needs a pull-up resistor from the VDD line to the SCL pin. Refer to Section 5.3 “I2C Serial Com- munications” for more details of I2C Serial Interface communication. 3.4 Serial Data Pin (SDA) SDA is the serial data pin of the I2C interface. The SDA pin is used for input and output data. In read mode, the conversion result is read from the SDA pin (output). In write mode, the device configuration bits are written (input) though the SDA pin. The SDA pin is an open- drain N-channel driver. Therefore, it needs a pull-up resistor from the VDD line to the SDA pin. Except for start and stop conditions, the data on the SDA pin must be stable during the high period of the clock. The high or low state of the SDA pin can only change when the clock signal on the SCL pin is low. Refer to Section 5.3 “I2C Serial Communications” for more details of I2C Serial Interface communication. Typical range of the pull-up resistor value for SCL and SDA is from 5 k Ω to 10 kΩ for standard (100 kHz) and fast (400 kHz) modes, and less than 1 k Ω for high speed mode (3.4 MHz). 3.5 Exposed Thermal Pad (EP) There is an internal electrical connection between the Exposed Thermal Pad (EP) and the VSS pin; they must be connected to the same potential on the Printed Circuit Board (PCB). CPIN V RSS CHn 4pF VT = 0.6V VT = 0.6V ILEAKAGE Sampling Switch SS RS CSAMPLE (3.2 pF) VDD (~ ±1 nA) LEGEND V = Signal Source ILEAKEAGE = Leakage Current at Analog Pin RSS = Source Impedance SS = Sampling Switch CHn = Analog Input Pin RS = Sampling Switch Resistor CPIN = Input Pin Capacitance CSAMPLE = Sample Capacitance VT = Threshold Voltage D1, D2 = ESD Protection Diode D1 D2 VSS |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |