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MPC5643L 数据表(PDF) 85 Page - Freescale Semiconductor, Inc |
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MPC5643L 数据表(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 98 page  Electrical characteristics MPC5643L Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 85 Figure 22. External interrupt timing 3.17.5 FlexCAN timing 3.17.6 DSPI timing Table 35. FlexCAN timing No. Symbol Parameter Conditions Min Max Unit 1tCANOV CTNX output valid after CLKOUT rising edge (output delay) — — 26.0 ns 2tCANSU CNRX input valid to CLKOUT rising edge (setup time) — — 9.8 ns Table 36. DSPI timing No. Symbol Parameter Conditions Min Max Unit 1tSCK D DSPI cycle time Master (MTFE = 0) 62 — ns D Slave (MTFE = 0) 62 — D Slave Receive Only Mode1 16 — 2tCSC D PCS to SCK delay — 16 — ns 3tASC D After SCK delay — 16 — ns 4tSDC D SCK duty cycle — 0.4 × tSCK 0.6 × tSCK ns 5tA D Slave access time SS active to SOUT valid — 40 ns 6tDIS D Slave SOUT disable time SS inactive to SOUT High-Z or invalid — 10 ns CLKOUT IRQ 1 2 3 |
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