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MPC5643L 数据表(PDF) 86 Page - Freescale Semiconductor, Inc |
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MPC5643L 数据表(HTML) 86 Page - Freescale Semiconductor, Inc |
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86 / 98 page ![]() MPC5643L Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 86 7tPCSC D PCSx to PCSS time — 13 — ns 8tPASC DPCSS to PCSx time — 13 — ns 9tSUI D Data setup time for inputs Master (MTFE = 0) 20 — ns Slave 2— Master (MTFE = 1, CPHA = 0) 5— Master (MTFE = 1, CPHA = 1) 20 — 10 tHI D Data hold time for inputs Master (MTFE = 0) –5 — ns Slave 4 — Master (MTFE = 1, CPHA = 0) 11 — Master (MTFE = 1, CPHA = 1) –5 — 11 tSUO D Data valid (after SCK edge) Master (MTFE = 0) — 4 ns Slave — 23 Master (MTFE = 1, CPHA = 0) — 12 Master (MTFE = 1, CPHA = 1) — 4 12 tHO D Data hold time for outputs Master (MTFE = 0) –2 — ns Slave 6 — Master (MTFE = 1, CPHA = 0) 6 — Master (MTFE = 1, CPHA = 1) –2 — 13 fmax D Maximum DSPI speed —— 4 MH z NOTES: 1 Slave Receive Only Mode can operate at a maximum frequency of 60 MHz. Note that in this mode, the DSPI can receive data on SIN, but no valid data is transmitted on SOUT. Table 36. DSPI timing (continued) No. Symbol Parameter Conditions Min Max Unit |
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