AT45DB321D datasheet(55/57 Pages) ATMEL

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3597N–DFLASH–04/09

AT45DB321D

28. Revision History

Revision Level – Release Date

History

A – November 2005

Initial Release

B – January 2006

Added 6 x 5 mm MLF (VDFN) package.

Added text, in “Programming the Configuration Register”, to indicate

that power cycling is required to switch to “power of 2” page size

after the opcode enable has been executed.

Corrected typographical error regarding the opcode for chip erase in

“Program and Erase Commands” table.

C – March 2006

Added Preliminary.

Changed the sector size from 256K bytes to 64K bytes.

Added the “Legacy Commands” table.

D – April 2006

Added 8 x 6 mm MLF (VDFN) package.

Changed the sector size of 0a and 0b to 8 pages and 120 pages

respectively.

Changed the Product Version Code to 00001.

E – July 2006

Corrected typographical errors.

F – August 2006

Added errata regarding Chip Erase.

Added AT45DB321D-SU to ordering information and corresponding

8S2 package.

G – September 2006

Removed “not recommended for new designs” note from ordering

information for 8MW package.

H – February 2007

Added AT45DB321D-CNU to ordering information and

corresponding 8CN3 package.

Removed “not recommended for new designs” comment from 8MW

package drawing.

I – August 2007

Added additional text to “power of 2” binary page size option.

Changed tVSCL from 50 µs to 70 µs.

Changed tRDPD from 30 µs to 35 µs.

Changed tXFR and tCOMP values from 400 µs to 200 µs.

Removed AT45DB321D-CNU from ordering information and

corresponding 8CN3 package.

J – April 2008

Added part number ordering code details for suffixes SL954/955.

Added ordering code details.

K – September 2008

Corrected typographical errors in Sector Erase section.

Corrected A17+A16 from x (Don’t Care) to A for opcode 7Ch in

Table 15-6.

Corrected PA8+PA7 from x (Don’t Care) to P for opcode 7Ch in

Table 15-7.

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