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AT697F 数据表(PDF) 1 Page - ATMEL Corporation |
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AT697F 数据表(HTML) 1 Page - ATMEL Corporation |
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1 / 155 page  Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache – 32 kbyte Multi-sets Instruction Cache • On-chip Peripherals: – Memory Interface PROM Controller SRAM Controller SDRAM Controller –Timers Two32-bit Timers Watchdog 32-bitTimer – Two 8-bit UARTs – Interrupt Controller with 8 External Programmable Inputs – 32 Parallel I/O Interface – 33MHz PCI Interface Compliant with 2.2 PCI Specification • Integrated 32/64-bit IEEE 754 Floating-point Unit • Fault Tolerance by Design – Full Triple Modular Redundancy (TMR) – EDAC Protection – Parity Protection • Debug and Test Facilities – Debug Support Unit (DSU) for Trace and Debug – IEEE 1149.1 JTAG Interface – Four Hardware Watchpoints • 8 and 40-bit boot-PROM Interface Possibilities • Operating range –Voltages 3.3V +/- 0.30V for I/O 1.8V +/- 0.15V for Core – Temperature -55°C to 125°C • Clock: 0MHz up to 100MHz • Power consumption: 1W at 100MHz • Performance: – 86MIPS (Dhrystone 2.1) – 23MFLOPS (Whetstone) • Radiation Performance – Tested up to a total dose of 300Krads (Si) according to the MIL-STD883 method 1019 – SEU error rate better than 1 E-5 error/device/day – No Single Event Latchup below a LET threshold of 70 MeV.cm²/mg • Package MCGA349 and MQFPF256 • Mass: 9g • Development Kit Including – AT697F Evaluation Board –AT697F Sample Rad-Hard 32 bit SPARC V8 Processor AT697F Advance Information 7703C–AERO–6/09 |
类似零件编号 - AT697F |
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类似说明 - AT697F |
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