ADIS16220

Rev. 0 | Page 11 of 20

DATA COLLECTION

The ADIS16220 samples and stores acceleration (vibration) and

analog input signal data using capture events. A capture event

involves several sampling/processing operations, as shown in

Figure 14. First, the ADIS16220 produces and stores 1024

samples of acceleration and analog input channel data into

the capture buffers. Second, the capture event takes a 5.12 ms

record of power supply measurements at a sample rate of

50 kHz and loads the average of this record into the CAPT_

SUPPLY register. Third, the capture event takes 64 samples of

internal temperature data over a period of 1.7 ms and loads the

average of this record into CAPT_TEMP.

CAPT_BUFA

1023

INTERNAL SAMPLING SYSTEM FILLS THE CAPTURE BUFFER

AND OUTPUT REGISTERS

DATA IN BUFFERS LOAD INTO

USER OUTPUT REGISTERS

0

CAPT_BUF1

CAPT_TEMP

CAPT_SUPPLY

CAPT_PNTR

AIN2

CAPTURE

BUFFER

AIN1

CAPTURE

BUFFER

ACCELER-

OMETER

CAPTURE

BUFFER

TRIPLE-CHANNEL

CAPTURE BUFFER

1024 SAMPLES

EACH

16-BIT DATA

CAPT_BUF2

Figure 14. Acceleration Capture Buffer Structure and Operation;

CAPT_BUF1 (AIN1) and CAPT_BUF2 (AIN2) Use Similar Structures

READING DATA FROM THE CAPTURE BUFFER

When a capture is complete, the first data samples load into the

CAPT_BUFx registers and 0x0000 loads into the index pointer

(CAPT_PNTR). The index pointer determines which data sam-

ples load into the CAPT_BUFx registers. For example, writing

0x0138 to the CAPT_PNTR register (DIN = 0x9A38, DIN =

into the CAPT_BUFx registers.

Table 9. CAPT_PNTR Bits Descriptions

Bit

Description (Default = 0x0000)

[15:10]

Reserved

[9:0]

Data bits

The index pointer automatically increments with a CAPT_BUFA,

CAPT_BUF1, or CAPT_BUF2 read command, which causes

the next set of capture data to load into each capture buffer

register.

Output Data Format

Table 10 offers a summary of the data format used by each

output registers. Table 11, Table 12, Table 13, and Table 14

provide example output coding for each register.

Table 10. Capture Output Register Formats

Register

Format1

Reference

CAPT_SUPPLY

12-bit binary, 0 V = 0 LSB,

1.2207 mV/LSB

Table 13

CAPT_TEMP

12-bit binary, +25°C = 1278 LSB,

−0.47°C/LSB

Table 14

CAPT_BUFA,

CAPT_PEAKA

16-bit twos complement

19.073 mg/LSB

Table 11

CAPT_BUF1,

CAPT_BUF2,

CAPT_PEAK1,

CAPT_PEAK2

16-bit twos complement

305.18 μV/LSB

Table 12

Acceleration (g)

LSB

Hex

Output (Binary)

+70

+3670

0x0E56

0000 1110 0101 0111

+0.019073

+1

0x0001

0000 0000 0000 0001

0

0

0x0000

0000 0000 0000 0000

−0.019073

−1

0xFFFF

1111 1111 1111 1111

−70

−3670

0xF1AA

1111 0001 1010 1010

Table 12. CAPT_BUF11 Data Format Examples

Level (mV)2

LSB

Hex

Output (Binary)

VDD/2+1000

+3277

0x0CCD

0000 1100 1100 1101

VDD/2+0.305

+1

0x0001

0000 0000 0000 0001

VDD/2

0

0x0000

0000 0000 0000 0000

VDD/2−0.305

−1

0xFFFF

1111 1111 1111 1111

VDD/2−1000

−3277

0xF333

1111 0011 0011 0011

registers.

3300 mV for VDD.

Table 13. CAPT_SUPPLY Data Format Examples

Supply Level (V)

LSB

Hex

Binary Output

3.6

2949

0xB85

1011 1000 0101

3.3 + 0.0012207

2704

0xA90

1010 1001 0000

3.3

2703

0xA8F

1010 1000 1111

3.3 – 0.0012207

2702

0xA8E

1010 1000 1110

3.15

2580

0xA14

1010 0001 0100

Table 14. CAPT_TEMP Data Format Examples

Temperature (°C)

LSB

Hex

Binary Output

+125

1065

0x429

0100 0100 1001

+25.47

1277

0x4FD

0100 1111 1101

+25

1278

0x4FE

0100 1111 1110

+24.53

1279

0x4FF

0100 1111 1111

−40

1416

0x588

0101 1000 1000