ADIS16220

Rev. 0 | Page 14 of 20

AVG_CNT[3:0] controls the averaging/decimating filter

structure in binomial steps, starting with 1 and ending with

1024. For example, set AVG_CNT[7:0] = 0x08 (DIN = 0xB608)

to select 256 averages and a decimation rate of 1/256. Note that

Table 24. AVG_CNT Bit Descriptions

Bit

Description (Default = 0x0000)

[15:4]

Reserved

[3:0]

Power-of-two setting for number of averages, binary

OFFSET ADJUSTMENT

The ACCL_NULL, AIN1_NULL, and AIN2_NULL registers

provide a bias adjustment function. For example, setting

ACCL_NULL = 0x009D (DIN = 0x829D) increases the accelera-

tion bias by 157 LSB (3 g). Set GLOB_CMD[0] = 1 (DIN =

0x3E01) to execute the autonull function, which loads the

offset registers with a value derived from a 678 ms average of

the acceleration data.

Table 25. ACCL_NULL Bit Descriptions

Bit

Description (Default = 0x0000)

[15:0]

Data bits, twos complement, 19.073 mg/LSB

sensitivity. See Figure 15 for impact on output.

Range = +8191 LSBs/−8192 LSBs

Table 26. AIN1_NULL and AIN2_NULL Bit Descriptions

Bit

Description (Default = 0x0000)

[15:0]

Data bits, twos complement, 305.18 μV/LSB

sensitivity. Signal path is similar to Figure 15.

Range = +8191 LSBs/−8192 LSBs

INPUT/OUTPUT FUNCTIONS

DIO1 and DIO2 are configurable as I/O lines that serve mul-

tiple purposes. The following register priority governs their

operation: DIO_CTRL, then GPIO_CTRL. The DIO_CTRL

register has four application-specific configuration options for

each signal. The capture trigger input option works in conjunction

with the manual capture mode and provides a hardware option

for driving a data capture event. When enabled, this function

searches for a positive pulse and the capture starts on the falling

edge of this pulse. The busy indicator output is active during

capture events and can help prevent undesirable interruptions.

For example, set DIO_CTRL[5:0] = 101111 (DIN = 0xB62F) to

establish DIO2 as a capture trigger input and keep DIO1 as a

positive polarity, busy indicator output. Using the busy indicator

as an interrupt driver enables the master processor to gather

capture data as soon as it is available, without having to poll

inputs or estimate execution times. The alarm indicator output

is active when the trigger set by ALM_CTRL and ALM_MAGx

activates. When configured as general-purpose lines, the

GPIO_CTRL register configures DIO1 and DIO2. For example,

set GPIO_CTRL = 0x0103 (DIN = 0xB203, then 0xB301) to set

DIO1 and DIO2 as outputs, with DIO1 in a 1 state and DIO2 in

a 0 state.

Table 27. DIO_CTRL Bit Descriptions

Bit

Description (Default = 0x000F)

[15:6]

Reserved

[5:4]

DIO2 function selection

00 = general-purpose I/O (use GPIO_CTRL)

01 = alarm indicator output (per ALM_CTRL)

10 = capture trigger inputs

11 = busy indicator output

[3:2]

DIO1 function selection

00 = general-purpose I/O (use GPIO_CTRL)

01 = alarm indicator output (per ALM_CTRL)

10 = capture trigger inputs

11 = busy indicator output

[1]

DIO2 line polarity; if [5:4] = 00, see GPIO_CTRL

1 = active high

0 = active low

[0]

DIO1 line polarity; if [3:2] = 00, see GPIO_CTRL

1 = active high

0 = active low

Table 28. GPIO_CTRL Bit Descriptions

Bit

Description (Default = 0x0000)

[15:10]

Reserved

[9]

General-purpose I/O output level, DIO2

[8]

General-purpose I/O output level, DIO1

[7:2]

Reserved

[1]

General-purpose I/O Line, data direction control, DIO2

1 = output, 0 = input

[0]

General-purpose I/O Line, data direction control, DIO1

1 = output, 0 = input

DIAGNOSTICS

In all of the error flags in DIAG_STAT, a 1 identifies an error

condition, whereas a 0 signals normal operation. All of the flags

remain until the next capture or reset command (GLOB_CMD[4]

= 1). DIAG_STAT[1:0] returns to 1 after the next sample (or

capture) if the error conditions still exist. DIAG_STAT[14:12]

provide flags to check the source of an event capture, prior to

reading the entire capture buffer. DIAG_STAT[10:8] offers flags

that check the peak values in the capture against the conditions

in the ALM_CTRL and ALM_MAGx registers. The flash test

produces an error flag in DIAG_STAT[6] to check if the sum of

the internal operating memory matches the sum of the same

flash memory locations. The capture period violation flag

(DIAG_STAT[4]) rises to 1 when the user attempts to use the

SPI while a capture sequence is in progress. Using the DIO1 line

in the factory default configuration as a busy indicator can help

prevent this violation. The SPI communication flag in

DIAG_STAT[3] raises to a Logic 1 when the total number of

SCLK clocks is not a multiple of 16 during a SPI transfer.