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AS8530-ASOT 数据表(PDF) 8 Page - ams AG

部件名 AS8530-ASOT
功能描述  LIN Transceiver with Integrated Voltage Regulator and MCU Interface for Automotive Applications
PDF  29 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS8530-ASOT 数据表(HTML) 8 Page - ams AG

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www.austriamicrosystems.com/Lin_CompanionIC/AS8530
Revision 0.01
8 - 29
AS8530
Preliminary Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Ibus_leak_rec
Driver OFF;
VSUP = 7.3V, 8V<VBUS<18
20
µA
Receiver
Ibus_leak_dom
Input Leakage current at receiver
Driver OFF; Vbus = 0V; VSUP = 12V;
VCC = 5V
-1
mA
Ibus_no_GND
VSS = VSUP; VSUP = 12V;
0V<VBUS<18V, VCC = 5V
-1
1
mA
Ibus_no_bat
VSUP = VSS; 0V<VBUS<18V, VCC = VSS
100
µA
Vbus_dom
0.4
VSUP
Vbus_rec
0.6
VSUP
Vbus_cnt
Vbus_cnt = (Vth_dom + Vth_rec)/2
1
0.475
0.525
VSUP
Vhys
Vhys = (Vth_dom – Vth_rec)
1
0.05
0.175
VSUP
1. Vth_dom: Receiver threshold of the recessive to dominant LIN bus edge
Vth_rec: Receiver threshold of the dominant to recessive LIN bus edge
Table 7. AC Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
D1
(worst case
20Kbps
transmission)
Vth_rec(max) = 0.744 x VSUP;
Vth_dom(max) = 0.581 x VSUP;
VSUP = 6.0V to 18V; tbit = 50μs;
D1 = tbus_rec(min) / (2 x tbit)
OTP selection = High Slew Mode
0.369
D2
(worst case
20kbps
transmission)
Vth_rec (min) = 0.422 x VSUP;
Vth_dom (min) = 0.284 x VSUP;
VSUP = 6V to 18V; tbit = 50μs;
D2 = tbus_rec(max) / (2 x tbit)
OTP selection = High Slew Mode
0.581
D3
(worst case
10.4kbps
transmission)
Vth_rec (max) = 0.778 x VSUP;
Vth_dom (max) = 0.616 x VSUP;
VSUP = 6.0V to 18V; tbit = 96μs;
D3 = tbus_rec(min) / (2 x tbit)
OTP selection = Low Slew Mode
0.417
D4
(worst case
10.4kbps
transmission)
Vth_rec (min) = 0.389 x VSUP;
Vth_dom (min) = 0.251 x VSUP;
VSUP = 6V to18V; tbit = 96μs;
D4 = tbus_rec(max) / (2 x tbit)
OTP selection = Low Slew Mode
0.59
tdLR
VCC = 5V; Propagation delay bus dominant
to RX LOW
6µs
tdHR
VCC = 5V; Propagation delay bus dominant
to RX HIGH
6µs
tRS
Receiver Delay symmetry
-2
2
µs
twake
Wake-up delay time
30
150
µs
tsln
Transition from standby mode to normal
mode (clock frequency is 128kHz ± 25%)
4
Clock
cycles
Table 6. DC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units



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